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ST7536CFN bảng dữ liệu(PDF) 4 Page - STMicroelectronics

tên linh kiện ST7536CFN
Giải thích chi tiết về linh kiện  POWER LINE MODEM
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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ST7536CFN bảng dữ liệu(HTML) 4 Page - STMicroelectronics

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FUNCTIONAL DESCRIPTION
1 - Transmit Section
The transmit mode is set when Rx/Tx = 0, if Rx/Tx
is held at 0 longer than 3s, thenthe device switches
automatically in the Rx mode. A new activation of
the Tx mode requires Rx/Tx to be returned to 1 for
a minimum 2
µs period before being set to 0.
The Transmit Data (TxD) is sampled on a positive
edge of CLR/T which delivers the transmit bit clock
when the transmit mode is selected. This data
enters a FSK modulator whose two basic frequen-
cies are selected by the Baud Rate Selection pin
(BRS) and the Channel Selection pin (CHS) ac-
cording to the Table 1.
CLR/T
TxD
DATA VALID
Figure 1 : Tx Data Input Timing
Table 1
BRS
CHS
Baud Rate
(Baud)
Tx Frequencies (kHz)
TxD=1 - TxD=0
0
0
600
81.75 - 82.35
0
1
600
67.2 - 67.8
1
0
1200
71.4 - 72.6
1
1
1200
85.95 - 87.15
These frequencies are synthesized from a
11.0592MHzcrystal oscillator ; theirprecision is the
same as the crystal one’s (100 ppm).
The modulatedsignal coming out of the FSK modu-
lator is filtered by a switched-capacitor band-pass
filter (Tx band-pass) in order to limit the output
spectrum and to reduce the level of harmonic com-
ponents.
The output stage of the Tx path consists of an
Automatic Level Control (ALC) system which keeps
the output signal (ATO) amplitude independant of
the lineimpedancevariations. ThisALC is a variable
gain system (with 32 discrete values) controlled by
an analog feed-back signal ALCI (see Figure 2).
The ALC gain range is 0dB to -26dB and gain
change is clocked at 7200Hz. Gain steps are of
magnitude 0.84dB typically.
A period of this clock is decomposed into a 34.7
µs
gain settling latency and a 104.2
µs peak detecting
time. The gain change is related to the result of a
peak detection obtained by making a direct com-
parison of ALCI maximum value (during detecting
time) with two threshold voltages VT1 and VT2 (see
Figure 2).
- max (VALCI) < VT1 - The next gain is increased
by 0.84dB,
-VT1
≤ max (VALCI) ≤ VT2 - No gain change,
-VT2 < max (VALCI) - The next gain is decreased
by 0.84dB.
Amplitude
modification
due to an
external cause
High Gain
Low Gain
Correct Gain
Correct
Gain
VT2
VT1
ALCI SIGNAL ENVELOP
ALC CLOCK
Figure 2 : Automatic Level Control Timing Chart
ST7536
4/9


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