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9 / 78 page 9/78 ST62T52C ST62T62C/E62C MEMORY MAP (Cont’d) 1.3.3 Data Space Data Space accommodates all the data necessary for processing the user program. This space com- prises the RAM resource, the processor core and peripheral registers, as well as read-only data such as constants and look-up tables in OTP/EPROM. 1.3.3.1 Data ROM All read-only data is physically stored in program memory, which also accommodates the Program Space. The program memory consequently con- tains the program code to be executed, as well as the constants and look-up tables required by the application. The Data Space locations in which the different constants and look-up tables are addressed by the processor core may be thought of as a 64-byte window through which it is possible to access the read-only data stored in OTP/EPROM. 1.3.3.2 Data RAM/EEPROM In ST62T52C, T62C and ST62E62C devices, the data space includes 60 bytes of RAM, the accu- mulator (A), the indirect registers (X), (Y), the short direct registers (V), (W), the I/O port registers, the peripheral data and control registers, the interrupt option register and the Data ROM Window register (DRW register). Additional RAM and EEPROM pages can also be addressed using banks of 64 bytes located be- tween addresses 00h and 3Fh. 1.3.4 Stack Space Stack space consists of six 12-bit registers which are used to stack subroutine and interrupt return addresses, as well as the current program counter contents. Table 1. Additional RAM / EEPROM Banks Table 2. ST62T52C, T62C and ST62E62C Data Memory Space Device RAM EEPROM ST62T52C 1 x 64 bytes - ST62T62C 1 x 64 bytes 1 x 64 bytes RAM / EEPRO M banks 000h 03Fh DATA ROM WINDOW AREA 040h 07Fh X REGISTER 080h Y REGISTER 081h V REGISTER 082h W REGISTER 083h DATA RAM 60 BYTES 084h 0BFh PORT A DATA REGISTE R 0C0h PORT B DATA REGISTE R 0C1h PORT C DATA REGISTER 0C2h RESERVED 0C3h PORT A DIRECTION REGISTER 0C4h PORT B DIRECTION REGISTER 0C5h PORT C DIRECTI ON REGISTER 0C6h RESERVED 0C7h INTERRUPT OPTI ON REGISTE R 0C8h* DATA ROM WINDOW REGISTER 0C9h* RESERVED 0CAh 0CBh PORT A OPTION REGISTER 0CCh PORT B OPTION REGISTER 0CDh PORT C OPTION REGISTE R 0CEh RESERVED 0CFh A/D DATA REGISTER 0D0h A/D CONTROL REGISTER 0D1h TIMER PRES CALER REGISTER 0D2h TIMER COUNTE R REGISTE R 0D3h TIMER STATUS CONTROL REGISTER 0D4h AR TIMER MODE CONTROL REGISTER 0D5h AR TIMER STA TUS/CONT ROL REGISTE R1 0D6h AR TIMER STA TUS/CONT ROL REGISTE R2 0D7h WATCHDOG REGIS TER 0D8h AR TIMER RELOAD/CAPTU RE REGISTE R 0D9h AR TIMER COMPARE REGIS TER 0DAh AR TIMER LOAD REGIS TER 0DBh OSCILLATOR CONTROL REGIS TER 0DCh* MISCELLANEOUS 0DDh RESERVED 0DEh 0E7h DATA RAM/EEP ROM REGIS TER 0E8h* RESERVED 0E9h EEPR OM CONTROL REGISTER 0EAh RESERVED 0EBh 0FEh ACCUMULATOR 0FFh * WRITE ONLY REGISTER 8 |
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