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STK14C88-3 bảng dữ liệu(PDF) 5 Page - Simtek Corporation

tên linh kiện STK14C88-3
Giải thích chi tiết về linh kiện  32Kx8 AutoStore nvSRAM
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nhà sản xuất  SIMTEK [Simtek Corporation]
Trang chủ  http://www.simtek.com
Logo SIMTEK - Simtek Corporation

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5
STK14C88-3
Feb, 2008
Document Control #ML0015 Rev 2.0
SRAM READ CYCLES #1 & #2
(VCC = 3V - 3.6V)
e
Note g:
W and HSB must be high during SRAM READ cycles.
Note h:
/O state assumes E and G < VIL and W > VIH; device is continuously selected.
Note i:
Measured
± 200mV from steady state output voltage.
NO.
SYMBOLS
PARAMETER
STK14C88-3-35
STK14C88-3-45
UNITS
#1, #2
Alt.
MIN
MAX
MIN
MAX
1
tELQV
tACS
Chip Enable Access Time
35
45
ns
2
tAVAV
g, t
ELEH
g
tRC
Read Cycle Time
35
45
ns
3
tAVQV
h
tAA
Address Access Time
35
45
ns
4
tGLQV
tOE
Output Enable to Data Valid
15
20
ns
5
tAXQX
h
tOH
Output Hold after Address Change
5
5
ns
6
tELQX
tLZ
Address Change or Chip Enable to Output Active
5
5
ns
7
tEHQZ
i
tHZ
Address Change or Chip Disable to Output Inactive
13
15
ns
8
tGLQX
tOLZ
Output Enable to Output Active
0
0
ns
9
tGHQZ
i
tOHZ
Output Disable to Output Inactive
13
15
ns
10
tELICCH
f
tPA
Chip Enable to Power Active
0
0
ns
11
tEHICCL
f
tPS
Chip Disable to Power Standby
35
45
ns
SRAM READ CYCLE #1: Address Controlledg, h
DATA VALID
5
tAXQX
3
tAVQV
DQ (DATA OUT)
ADDRESS
2
tAVAV
SRAM READ CYCLE #2: E and G Controlledg
6
tELQ X
ST AND BY
DAT A VAL ID
4
tGL QV
DQ (D ATA OUT)
E
ADDR ESS
G
ICC
AC T IVE
10
tELI CC H
11
tEHI CC L
7
tEHQ Z
8
tGL Q X
1
tEL Q V
9
tGH Q Z
2
tELE H
29
tEHAX
3
tAV QV
27


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