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1 / 19 page January 2008 Rev 1 1/19 19 STG5223 Low voltage 0.5 Ω dual SPDT switch with break-before-make Features ■ Ultra low power dissipation: ICC = 0.2 μA (max.) at TA= 85 °C ■ Low ON resistance: –RON =0.50 Ω (max. TA =25°C) at VCC =4.3 V –RON =0.55 Ω (max. TA =25°C) at VCC =3.6 V –RON =0.55 Ω (max. TA =25°C) at VCC =3.0 V ■ Wide operating voltage range: VCC (opr) = 1.65 V to 4.3 V single supply ■ 5 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.3 V ■ Latch-up performance exceeds 300 mA (JESD 17) ■ ESD performance: HBM > 2 kV (MIL STD 883 method 3015) Description The STG5223 is a high-speed CMOS dual analog SPDT (single pole dual throw) switch or dual 2:1 multiplexer/demultiplexer bus switch fabricated in silicon gate C2MOS technology. It is designed to operate from 1.65 to 4.3 V, making this device ideal for portable applications. It offers very low ON resistance (<0.5 Ω) at VCC = 3.0 V. The nIN inputs are provided to control the switches. The switches nS1 are ON (connected to common ports Dn) when the nIN input is held high and OFF (high impedance state exists between the two ports) when nIN is held low. The switches nS2 are ON (connected to common ports Dn) when the nIN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, break-before- make delay time and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage immunity. \ QFN10L (1.8x1.4 mm) Table 1. Device summary Order code Package Packaging STG5223QTR QFN10L (1.8 x 1.4 mm) Tape and reel www.st.com |
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