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AD5554BRS bảng dữ liệu(PDF) 1 Page - Analog Devices |
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1 / 20 page Quad, Current-Output, Serial-Input 16-/14-Bit DACs AD5544/AD5554 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. FEATURES AD5544 16-bit resolution AD5554 14-bit resolution 2 mA full-scale current ±20%, with VREF = ±10 V 2 µs settling time VSS BIAS for zero-scale error reduction @ temp midscale or zero-scale reset Four separate, 4-Q multiplying reference inputs SPI ®-compatible 3-wire interface Double buffered registers enable Simultaneous multichannel change Internal power ON reset Compact SSOP-28 package APPLICATIONS Automatic test equipment Instrumentation Digitally controlled calibration GENERAL DESCRIPTION The AD5544/AD5554 quad, 16-/14-bit, current-output, digital to-analog converters are designed to operate from a single 5 V supply. The applied external reference input voltage (VREF) determines the full-scale output current. Integrated feedback resistors (RFB) provide temperature-tracking, full-scale voltage outputs when combined with an external I-to-V precision amplifier. A double-buffered serial-data interface offers high speed, 3-wire, SPI- and microcontroller-compatible inputs using serial- data-in (SDI), a chip-select (CS), and clock (CLK) signals. In addition, a serial-data-out pin (SDO) allows for daisy-chaining when multiple packages are used. A common, level-sensitive, load-DAC strobe (LDAC) input allows the simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power ON reset forces the output voltage to zero at system turn ON. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1. The AD5544/AD5554 are packaged in the compact SSOP-28. FUNCTIONAL BLOCK DIAGRAM INPUT REGISTER R 16 DAC A REGISTER R 2:4 DECODE DAC A B C D POWER- ON RESET D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 A0 A1 DAC B DAC C DAC D DAC A EN VDD RFBA IOUTA AGNDA AGNDF VSS LDAC MSB RS DGND CLK CS SDI SDO VREFAB C RFBB IOUTB AGNDB RFBC IOUTC AGNDC RFBD IOUTD AGNDD AD5544 INPUT REGISTER R INPUT REGISTER R INPUT REGISTER R DAC B REGISTER R DAC C REGISTER R DAC D REGISTER R D Figure 1. 57344 49152 40960 32768 24576 16384 8192 0 65536 CODE (Decimal) 1.0 0.5 0 –0.5 –1.0 1.0 0.5 0 –0.5 –1.0 1.0 0.5 0 –0.5 –1.0 1.0 0.5 0 –0.5 –1.0 DAC A DAC B DAC C DAC D Figure 2. AD5544 INL vs. Code Plot (TA = 25°C) |
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