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ST7LCRDIE6 bảng dữ liệu(PDF) 11 Page - STMicroelectronics

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ST7LCR
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4
Electrical characteristics
4.1
Absolute maximum ratings
This product contains devices for protecting the inputs against damage due to high static
voltages, however it is advisable to take normal precautions to avoid applying any voltage
higher than the specified maximum rated voltages. For proper operation it is recommended
that VI and VO be higher than VSS and lower than VDD. Reliability is enhanced if unused
inputs are connected to an appropriate logic voltage level (VDD or VSS).
Power considerations
The average chip-junction temperature, TJ, in Celsius can be obtained from:
where:
TA = Ambient temperature
RthJA = Package thermal resistance (junction-to ambient)
PD = PINT + PPORT
PINT = IDD x VDD (chip internal power)
PPORT = Port power dissipation determined by the user
Stresses above those listed as “absolute maximum ratings” may cause permanent damage
to the device. This is a stress rating only and functional operation of the device at these
conditions is not implied. Exposure to maximum rating for extended periods may affect
device reliability.
Warning:
Direct connection to VDD or VSS of the I/O pins could damage
the device in case of program counter corruption (due to
unwanted change of the I/O configuration). To guarantee safe
conditions, this connection has to be done through a typical
10k
Ω pull-up or pull-down resistor.
Table 3.
Absolute maximum ratings
Symbol
Ratings
Value
Unit
VDD - VSS
Supply voltage
6.0
V
VIN
Input voltage
VSS - 0.3 to VDD + 0.3
V
VOUT
Output voltage
VSS - 0.3 to VDD + 0.3
V
ESD
ESD susceptibility
2000
V
ESDCard
ESD susceptibility for card pads
4000
V
IVDD_I
Total current into VDD_I (source)
250
mA
IVSS_I
Total current out of VSS_I (sink)
250
T
J
T
A
PD
RthJA
×
+
=


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