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MV20556 bảng dữ liệu(PDF) 8 Page - Mosel Vitelic, Corp |
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MV20556 bảng dữ liệu(HTML) 8 Page - Mosel Vitelic, Corp |
8 / 30 page MV20556 MOSEL VITELIC INC. 8/27 PID256** 07/97 Specifications subject to change without notice, contact your sales representatives for the most recent information. Preliminary Memory Map Details (Cont'd) Program Status Word Register(Cont'd) F0 is a general purpose flag which is pushed onto the stack as part of a PSW save. The two Register Bank select bits (RS1 or RS0) determine which one of the four Register Banks is selected. Stack Pointer The 8-bit Stack Pointer (SP) contains the address at which the last byte was pushed onto the stack. This is also the address of the next byte that will be popped. The SP is incremented during a push. SP can be read or written to under software control. Data Pointer (High) and Data Pointer (Low) The 16-bit Data Pointer (DPTR) register is the concatenation of registers DPH (data pointer's high-order byte) and DPL (data pointer's low-order byte). The DPTR is used in Register-Indirect Addressing to move Program Memory constants, to move External Data Memory variables, and to branch over the 64K Program Memory address space. Interrupt Priority Register The Interrupt Priority (IPC) register contains the control bits to set an interrupt to a desired level. A bit set to a one gives the particular interrupt a high priority listing. Interrupt Enable Register The Interrupt Enable (IEC) register stores the enable bits for each of the five interrupt sources. Also included is a global enable/disable bit of the interrupt system. Timer/Counter Mode Register Within the Times Mode (TMOD) register are the bits that select which operations each timer/counter will do. Timer/Counter Control Register The timer/counters are controlled by the Timer/Counter Control (TCON) register bits. The start/stop bits for the timer/counters along with the overflow and interrupt request flags are mapped in TCON. Timer/Counter 1 (High), Timer/Counter 1 (Low), Timer/Counter 0 (High), Timer/Counter 0 (Low) There are four register locations for the two 16-bit timer/counters. These registers can be read or written to, to give the programmer easy access to the timer/counters. TH1 and TH0 refer to the 8 high-order bits of timer/counter 1 and 0, respectively. TL1 and TL0 refer to the low-order bits of both timer/counter 1 and 0. Serial Control Register The Serial Data Buffer (SBUF) register is used to hold serial port input or output data depending on whether the serial port is receiving or transmitting data. PSW definition MSB LSB CY AC F0 RS1 RS0 OV - P CY AC F0 RS1 RS0 OV - P PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 Carry flag Auxiliary carry flag Flag 0 available to the user for general purpose Register bank selector bit 1. Register bank selector bit 0. Overflow flag Usable as a general purpose flag Parity flag. Set/clear by hardware at each instruction cycle to indicate an odd/ even number of "1" bus in the accumulator RS1 0 0 1 1 RS0 0 1 0 1 REGISTER BANK 0 1 2 3 ADDRESS 00H-07H 08H-0FH 10H-17H 18H-1FH |
Số phần tương tự - MV20556 |
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Mô tả tương tự - MV20556 |
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