www.ti.com

FEATURES

SN54ALVTH16374...WDPACKAGE

PACKAGE

(TOP VIEW)

SN74ALVTH16374...DGG,DGV,ORDL

1OE

1CLK

1Q1

1D1

1Q2

1D2

GND

GND

1Q3

1D3

1Q4

1D4

V

CC

V

CC

1Q5

1D5

1Q6

1D6

GND

GND

1Q7

1D7

1Q8

2Q1

2Q2

GND

2Q3

2Q4

V

CC

2Q5

2Q6

GND

2Q7

2Q8

2OE

1D8

2D1

2D2

GND

2D3

2D4

V

CC

2D5

2D6

GND

2D7

2D8

2CLK

48

1

47

2

46

3

45

4

44

5

43

6

42

7

41

8

40

9

39

10

38

11

37

36

35

34

33

32

31

30

29

28

27

26

25

12

13

14

15

16

17

18

19

20

21

22

23

24

DESCRIPTION/ORDERING INFORMATION

SN54ALVTH16374,, SN74ALVTH16374

2.5-V/3.3-V 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCES068G – JUNE 1996 – REVISED NOVEMBER 2006

• State-of-the-Art Advanced BiCMOS

Technology (ABT) Widebus™ Design for 2.5-V

and 3.3-V Operation and Low Static Power

Dissipation

• Support Mixed-Mode Signal Operation

(5-V Input and Output Voltages With 2.3-V to

• Typical V

• High Drive (–24/24 mA at 2.5-V V

mA at 3.3-V )

• Power Off Disables Outputs, Permitting Live

Insertion

• High-Impedance State During Power Up and

Power Down Prevents Driver Conflict

• Uses Bus Hold on Data Inputs in Place of

External Pullup/Pulldown Resistors to Prevent

the Bus From Floating

• Auto3-State Eliminates Bus Current Loading

• Latch-Up Performance Exceeds 250 mA Per

JESD 17

• ESD Protection

–

Exceeds 2000 V Per MIL-STD-883, Method

3015

–

Exceeds 200 V Using Machine Model

–

Exceeds 1000 V Using Charged-Device

Model, Robotic Method

• Flow-Through Architecture Facilitates Printed

Circuit Board Layout

• Distributed V

Minimizes High-Speed Switching Noise

• Package Options Include Plastic Shrink

Small-Outline (DL), Thin Shrink Small-Outline

(DGG), Thin Very Small-Outline (DGV)

Packages, and 380-mil Fine-Pitch Ceramic Flat

(WD) Package

The 'ALVTH16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed for 2.5-V or

devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and

working registers.

These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock

(CLK), the flip-flops store the logic levels set up at the data (D) inputs.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus is a trademark of Texas Instruments.

UNLESS

OTHERWISE

NOTED

this

document

contains

Copyright © 1996–2006, Texas Instruments Incorporated

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.