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Giải thích chi tiết về linh kiện  TRIPLE-3-INPUT PSITIVE-NAND GATES
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SN54ACT10, SN74ACT10
TRIPLE 3INPUT POSITIVENAND GATES
SCAS526C − AUGUST 1995 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram, each gate (positive logic)
12
1Y
1A
1B
1C
6
2Y
2A
2B
2C
8
3Y
3A
3B
3C
1
2
13
3
4
5
11
10
9
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
−0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
−0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1)
−0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC)
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): D package
86
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package
96
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
80
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
76
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
113
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
−65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54ACT10
SN74ACT10
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
4.5
5.5
4.5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
IOH
High-level output current
−24
−24
mA
IOL
Low-level output current
24
24
mA
∆t/∆v
Input transition rise or fall rate
8
8
ns/V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.


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