công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
M25PX64 bảng dữ liệu(PDF) 5 Page - Numonyx B.V |
|
M25PX64 bảng dữ liệu(HTML) 5 Page - Numonyx B.V |
5 / 66 page M25PX64 List of figures 5/66 List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2. VDFPN8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. SO16 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 7. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 8. Write enable (WREN) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 9. Write disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 10. Read identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 31 Figure 11. Read status register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . . 33 Figure 12. Write status register (WRSR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 13. Read data bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 36 Figure 14. Read data bytes at higher speed (FAST_READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 15. Dual output fast read instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 16. Read lock register (RDLR) instruction sequence and data-out sequence . . . . . . . . . . . . . 39 Figure 17. Read OTP (ROTP) instruction and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 18. Page program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 19. Dual input fast program (DIFP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 20. Program OTP (POTP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 21. How to permanently lock the 64 OTP bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 22. Write to lock register (WRLR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 23. Subsector erase (SSE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 24. Sector erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 25. Bulk erase (BE) instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Figure 26. Deep power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Figure 27. Release from deep power-down (RDP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 52 Figure 28. Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Figure 29. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 30. Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 31. Write protect setup and hold timing during WRSR when SRWD=1 . . . . . . . . . . . . . . . . . . 60 Figure 32. Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Figure 33. Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 34. VPPH timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 35. VDFPN8 (MLP8) 8-lead very thin dual flat package no lead, 8 × 6 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 36. SO16 wide - 16-lead plastic small outline, 300 mils body width, package outline . . . . . . . 63 |
Số phần tương tự - M25PX64 |
|
Mô tả tương tự - M25PX64 |
|
|
Link URL |
Chính sách bảo mật |
ALLDATASHEET.VN |
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |