List of Tables
Table 1.
Documentation Conventions ............................................................................................ 18
Table 3-1.
Memory Map ................................................................................................................... 39
Table 4-1.
Exception Types .............................................................................................................. 41
Table 4-2.
Interrupts ........................................................................................................................ 42
Table 5-1.
JTAG Port Pins Reset State ............................................................................................. 46
Table 5-2.
JTAG Instruction Register Commands ............................................................................... 51
Table 6-1.
System Control Register Map ........................................................................................... 61
Table 7-1.
Hibernation Module Register Map ................................................................................... 119
Table 8-1.
Flash Protection Policy Combinations ............................................................................. 135
Table 8-2.
Flash Resident Registers ............................................................................................... 136
Table 8-3.
Flash Register Map ........................................................................................................ 136
Table 9-1.
GPIO Pad Configuration Examples ................................................................................. 160
Table 9-2.
GPIO Interrupt Configuration Example ............................................................................ 160
Table 9-3.
GPIO Register Map ....................................................................................................... 161
Table 10-1.
16-Bit Timer With Prescaler Configurations ..................................................................... 201
Table 10-2.
Timers Register Map ...................................................................................................... 207
Table 11-1.
Watchdog Timer Register Map ........................................................................................ 234
Table 12-1.
UART Register Map ....................................................................................................... 262
Table 13-1.
SSI Register Map .......................................................................................................... 308
Table 14-1.
Examples of I
2C Master Timer Period versus Speed Mode ............................................... 337
Table 14-2.
Inter-Integrated Circuit (I
2C) Interface Register Map ......................................................... 346
Table 14-3.
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 351
Table 15-1.
Comparator 0 Operating Modes ..................................................................................... 371
Table 15-2.
Comparator 1 Operating Modes ..................................................................................... 371
Table 15-3.
Comparator 2 Operating Modes ...................................................................................... 372
Table 15-4.
Internal Reference Voltage and ACREFCTL Field Values ................................................. 372
Table 15-5.
Analog Comparators Register Map ................................................................................. 374
Table 16-1.
PWM Register Map ........................................................................................................ 387
Table 17-1.
QEI Register Map .......................................................................................................... 421
Table 19-1.
Signals by Pin Number ................................................................................................... 436
Table 19-2.
Signals by Signal Name ................................................................................................. 440
Table 19-3.
Signals by Function, Except for GPIO ............................................................................. 445
Table 19-4.
GPIO Pins and Alternate Functions ................................................................................. 448
Table 20-1.
Temperature Characteristics ........................................................................................... 450
Table 20-2.
Thermal Characteristics ................................................................................................. 450
Table 21-1.
Maximum Ratings .......................................................................................................... 451
Table 21-2.
Recommended DC Operating Conditions ........................................................................ 451
Table 21-3.
LDO Regulator Characteristics ....................................................................................... 452
Table 21-4.
Flash Memory Characteristics ........................................................................................ 452
Table 21-5.
Phase Locked Loop (PLL) Characteristics ....................................................................... 453
Table 21-6.
Clock Characteristics ..................................................................................................... 453
Table 21-7.
Crystal Characteristics ................................................................................................... 453
Table 21-8.
Analog Comparator Characteristics ................................................................................. 454
Table 21-9.
Analog Comparator Voltage Reference Characteristics .................................................... 454
Table 21-10.
I
2C Characteristics ......................................................................................................... 454
Table 21-11.
Hibernation Module Characteristics ................................................................................. 455
September 02, 2007
10
Preliminary
Table of Contents
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