10
General-Purpose Timers ................................................................................................. 198
10.1
Block Diagram ........................................................................................................................ 199
10.2
Functional Description ............................................................................................................. 199
10.2.1 GPTM Reset Conditions .......................................................................................................... 199
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 199
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 201
10.3
Initialization and Configuration ................................................................................................. 205
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 205
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 206
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 206
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 207
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 207
10.3.6 16-Bit PWM Mode ................................................................................................................... 208
10.4
Register Map .......................................................................................................................... 208
10.5
Register Descriptions .............................................................................................................. 209
11
Watchdog Timer ............................................................................................................... 234
11.1
Block Diagram ........................................................................................................................ 234
11.2
Functional Description ............................................................................................................. 234
11.3
Initialization and Configuration ................................................................................................. 235
11.4
Register Map .......................................................................................................................... 235
11.5
Register Descriptions .............................................................................................................. 236
12
Analog-to-Digital Converter (ADC) ................................................................................. 257
12.1
Block Diagram ........................................................................................................................ 258
12.2
Functional Description ............................................................................................................. 258
12.2.1 Sample Sequencers ................................................................................................................ 258
12.2.2 Module Control ........................................................................................................................ 259
12.2.3 Hardware Sample Averaging Circuit ......................................................................................... 260
12.2.4 Analog-to-Digital Converter ...................................................................................................... 260
12.2.5 Test Modes ............................................................................................................................. 260
12.2.6 Internal Temperature Sensor .................................................................................................... 260
12.3
Initialization and Configuration ................................................................................................. 261
12.3.1 Module Initialization ................................................................................................................. 261
12.3.2 Sample Sequencer Configuration ............................................................................................. 261
12.4
Register Map .......................................................................................................................... 262
12.5
Register Descriptions .............................................................................................................. 263
13
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 290
13.1
Block Diagram ........................................................................................................................ 291
13.2
Functional Description ............................................................................................................. 291
13.2.1 Transmit/Receive Logic ........................................................................................................... 291
13.2.2 Baud-Rate Generation ............................................................................................................. 292
13.2.3 Data Transmission .................................................................................................................. 293
13.2.4 Serial IR (SIR) ......................................................................................................................... 293
13.2.5 FIFO Operation ....................................................................................................................... 294
13.2.6 Interrupts ................................................................................................................................ 294
13.2.7 Loopback Operation ................................................................................................................ 295
13.2.8 IrDA SIR block ........................................................................................................................ 295
13.3
Initialization and Configuration ................................................................................................. 295
13.4
Register Map .......................................................................................................................... 296
5
September 02, 2007
Preliminary
LM3S1138 Microcontroller
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