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AD9879 bảng dữ liệu(PDF) 1 Page - Analog Devices

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AD9879 bảng dữ liệu(HTML) 1 Page - Analog Devices

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Mixed-Signal Front End
Set-Top Box, Cable Modem
AD9879
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
FEATURES
Low cost 3.3 V MxFE™ for
DOCSIS-, EURO-DOCSIS-, DVB-, DAVIC-compliant
set-top box and cable modem applications
232 MHz quadrature digital upconverter
12-bit direct IF DAC (TxDAC+™)
Up to 65 MHz carrier frequency DDS
Programmable sampling clock rates
16× upsampling interpolation LPF
Single-tone frequency synthesis
Analog Tx output level adjust
Direct cable amp interface
12-bit, 33 MSPS direct IF ADC
with optional video clamping input
10-bit, 33 MSPS direct IF ADC
Dual 7-bit, 16.5 MSPS sampling I/Q ADC
12-bit Σ-∆ auxiliary DAC
APPLICATIONS
Cable modem and satellite systems
Set-top boxes
Power line modem
PC multimedia
Digital communications
Data and video modems
QAM, OFDM, FSK modulation
FUNCTIONAL BLOCK DIAGRAM
TX DATA
SPORT
RXIQ[3:0]
RXIF[11:0]
VIDEO
RX12
RX10
RXQ
RXI
MCLK
CA_PORT
TX
DAC
SINC–1
TX
DDS
Q
I
CONTROL REGISTERS
PLL
XM/N
MUX
ADC
ADC
ADC
CLAMP
AD9879
⇑16
MUX
MUX
8
10
12
MUX
Σ-∆_OUT
Σ-∆
4
2
2
12
Figure 1.
GENERAL DESCRIPTION
The AD9879 is a single-supply set-top box and cable modem
mixed-signal front end. The device contains a transmit path
interpolation filter, complete quadrature digital upconverter,
and transmit DAC. The receive path contains a 12-bit ADC, a
10-bit ADC, and dual 7-bit ADCs. All internally required clocks
and an output system clock are generated by the phase-locked
loop (PLL) from a single crystal or clock input.
The transmit path interpolation filter provides an upsampling
factor of 16× with an output signal bandwidth as high as
8.3 MHz. Carrier frequencies up to 65 MHz with 26 bits of
frequency tuning resolution can be generated by the direct
digital synthesizer (DDS). The transmit DAC resolution is
12 bits and can run at sampling rates as high as 232 MSPS.
Analog output scaling from 0.0 dB to 7.5 dB in 0.5 dB steps is
available to preserve SNR when reduced output levels are
required.
The 12-bit and 10-bit IF ADCs can convert direct IF inputs up
to 70 MHz and run at sample rates up to 33 MSPS. A video
input with an adjustable signal clamping level, along with the
10-bit ADC, allow the AD9879 to process an NTSC and a QAM
channel simultaneously.
The programmable Σ-Δ DAC can be used to control external
components, such as variable gain amplifiers (VGAs) or voltage
controlled tuners. The CA port provides an interface to the
AD8321/AD8323 or AD8322/AD8327 programmable gain
amplifier (PGA) cable drivers, enabling host processor control
via the MxFE SPORT.
The AD9879 is available in a 100-lead MQFP. It offers enhanced
receive path undersampling performance and lower cost when
compared with the pin-compatible AD9873. The AD9879 is
specified over the commercial (−40°C to +85°C) temperature
range.


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