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LM2619 bảng dữ liệu(PDF) 10 Page - National Semiconductor (TI) |
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LM2619 bảng dữ liệu(HTML) 10 Page - National Semiconductor (TI) |
10 / 15 page Device Information (Continued) PFM OPERATION Connecting the SYNC/MODE to SGND sets the LM2619 to hysteretic PFM operation. While in PFM (Pulse Frequency Modulation) mode, the output voltage is regulated by switch- ing with a discrete energy per cycle and then modulating the cycle rate, or frequency, to control power to the load. This is done by using an error comparator to sense the output voltage. The device waits as the load discharges the output filter capacitor, until the output voltage drops below the lower threshold of the PFM error-comparator. Then the device initiates a cycle by turning on the PFET switch. This allows current to flow from the input, through the inductor to the output, charging the output filter capacitor. The PFET is turned off when the output voltage rises above the regulation threshold of the PFM error comparator. Thus, the output voltage ripple in PFM mode is proportional to the hysteresis of the error comparator. In PFM mode, the device only switches as needed to service the load. This lowers current consumption by reducing power consumed during the switching action in the circuit, due to transition losses in the internal MOSFETs, gate drive cur- rents, eddy current losses in the inductor, etc. It also im- proves light-load voltage regulation. During the second half of the cycle, the intrinsic body diode of the NFET synchro- nous rectifier conducts until the inductor current ramps to zero. OPERATING MODE SELECTION The LM2619 is designed for digital control of the operating modes by the system controller. This prevents the spurious switch over from low-noise PWM mode between transmis- sion intervals in mobile phone applications that can occur in other products. The SYNC/MODE digital input pin is used to select the operating mode. Setting SYNC/MODE high (above 1.3V) selects 600kHz current-mode PWM operation. PWM mode is optimized for low-noise, high-power operation for use when the load is active. Setting SYNC/MODE low (below 0.4V) selects hysteretic voltage-mode PFM operation. PFM mode is optimized for reducing power consumption and extending battery life when the load is in a low-power standby mode. In PFM mode, quiescent current into the V DD pin is 160µA typ. In contrast, PWM mode V DD-pin quiescent current is 600µA typ. PWM operation is intended for use with loads of 50mA or more, when low noise operation is desired. Below 100mA, PFM operation can be used to allow precise regulation, and reduced current consumption. The LM2619 has an over- voltage feature that prevents the output voltage from rising too high, when the device is left in PWM mode under low- load conditions. See Overvoltage Protection, for more infor- mation. Switch modes with the SYNC/MODE pin, using a signal with a slew rate faster than 5V/100µs. Use a comparator, Schmitt trigger or logic gate to drive the SYNC/MODE pin. Do not leave the pin floating or allow it to linger between thresholds. These measures will prevent output voltage errors in re- sponse to an indeterminate logic state. The LM2619 switches on each rising edge of SYNC. Ensure a minimum load to keep the output voltage in regulation when switching modes frequently. FREQUENCY SYNCHRONIZATION The SYNC/MODE input can also be used for frequency synchronization. During synchronization, the LM2619 ini- tiates cycles on the rising edge of the clock. When synchro- nized to an external clock, it operates in PWM mode. The device can synchronize to a 50% duty-cycle clock over frequencies from 500kHz to 1MHz. If a different duty cycle is used other than 50% the range for acceptable duty cycles is 30% to 70%. Use the following waveform and duty cycle guidelines when applying an external clock to the SYNC/MODE pin. Clock under/overshoot should be less than 100mV below GND or above V DD. When applying noisy clock signals, especially sharp edged signals from a long cable during evaluation, terminate the cable at its characteristic impedance and add an RC filter to the SYNC pin, if necessary, to soften the slew rate and over/undershoot. Note that sharp edged signals from a pulse or function generator can develop under/ overshoot as high as 10V at the end of an improperly termi- nated cable. OVERVOLTAGE PROTECTION The LM2619 has an over-voltage comparator that prevents the output voltage from rising too high when the device is left in PWM mode under low-load conditions. When the output voltage rises by about 100mV (Figure 3) over its regulation threshold, the OVP comparator inhibits PWM operation to skip pulses until the output voltage returns to the regulation threshold. When resistor dividers are used the OVP thresh- old at the output will be the value of the threshold at the feedback pin times the resistor divider ratio. In over voltage protection, output voltage and ripple will increase. SHUTDOWN MODE Setting the EN digital input pin low (<0.4V) places the LM2619 in a 0.02µA (typ) shutdown mode. During shutdown, the PFET switch, NFET synchronous rectifier, reference, control and bias circuitry of the LM2619 are turned off. Setting EN high enables normal operation. While turning on, soft start is activated. EN should be set low to turn off the LM2619 during system power-up and undervoltage conditions when the supply is PFM Mode Switching Waveform 20057426 A: Inductor Current, 500mA/div B: SW Pin, 2V/div C: VOUT, 50mV/div, AC Coupled FIGURE 7. www.national.com 10 |
Số phần tương tự - LM2619_03 |
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Mô tả tương tự - LM2619_03 |
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