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MC10H424L bảng dữ liệu(PDF) 2 Page - ON Semiconductor |
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2 / 4 page MC10H424 http://onsemi.com 2 MAXIMUM RATINGS Symbol Characteristic Rating Unit VEE Power Supply (VCC = 5.0 V) –8.0 to 0 Vdc VCC Power Supply (VEE = – 5.2 V) 0 to +7.0 Vdc VI Input Voltage (ECL) 0 to VEE Vdc VI Input Voltage (TTL) 0 to VCC Vdc Iout Output Current – Continuous – Surge 50 100 mA TA Operating Temperature Range 0 to +75 °C Tstg Storage Temperature Range – Plastic – Ceramic –55 to +150 –55 to +165 °C ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ± 5%, VCC = 5.0 V ± 5.0%) 0 ° 25 ° 75 ° Symbol Characteristic Min Max Min Max Min Max Unit IE Negative Power Supply Drain Current – 72 – 66 – 72 mAdc ICCH Positive Power Supply – 16 – 16 – 18 mAdc ICCL Drain Current – 25 – 25 – 25 mAdc IR Reverse Current Pin 5,7,10,11 – 50 – 50 – 50 µAdc IF Forward Current Pin 5,7,10,11 – –3.2 – –3.2 – –3.2 mAdc IinH Input HIGH Current Pin 6 – 450 – 310 – 310 µAdc IinL Input LOW Current Pin 6 0.5 – 0.5 – 0.3 – µAdc V(BR)in Input Breakdown Voltage 5.5 – 5.5 – 5.5 – Vdc VI Input Clamp Voltage – –1.5 – –1.5 – –1.5 Vdc VOH High Output Voltage –1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc VOL Low Output Voltage –1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc VIH High Input Voltage Pin 5,7,10,11 2.0 – 2.0 – +2.0 – Vdc VIL Low Input Voltage Pin 5,7,10,11 – 0.8 – 0.8 – 0.8 Vdc VIH High Input Voltage Pin 6 –1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc VIL Low Input Voltage Pin 6 –1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc AC PARAMETERS Propaga- tion Delay Data Strobe tpd 0.5 0.5 2.2 2.2 0.5 0.5 2.3 2.3 0.5 0.5 2.4 2.4 ns Rise Time tr 0.5 2.0 0.5 2.0 0.5 2.2 ns Fall Time tf 0.5 2.0 0.5 2.0 0.5 2.2 ns NOTE: Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.1 volts. APPLICATIONS INFORMATION The MC10H424 has TTL–compatible inputs, an ECL strobe and MECL complementary open–emitter outputs that allow use as an inverting/non–inverting translator or as a differential line driver. When the common strobe input is at the low–logic level, it forces all true outputs to a MECL low–logic state and all inverting outputs to a MECL high–logic state. An advantage of this device is that TTL–level information can be transmitted differentially, via balanced twisted pair lines, to MECL equipment, where the signal can be received by the MC10H115 or MC10H116 differential line receivers. |
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Mô tả tương tự - MC10H424L |
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