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OP220EZ bảng dữ liệu(PDF) 4 Page - Analog Devices |
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4 / 12 page REV. A –4– OP220–SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS * Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V Differential Input Voltage . . . . . . . . . . 30 V or Supply Voltage Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration Indefinite Storage Temperature Range . . . . . . . . . . . . –65 ∞C to +150∞C Junction Temperature (Ti) . . . . . . . . . . . . . –65 ∞C to +150∞C Operating Temperature Range OP220A/OP220C . . . . . . . . . . . . . . . . . . –55 ∞C to +125∞C OP220E/OP220F . . . . . . . . . . . . . . . . . . . . –25 ∞C to +85∞C OP220G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 ∞C to +85∞C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300 ∞C NOTES *Absolute Maximum Ratings apply to packaged parts, unless otherwise noted. WAFER TEST LIMITS OP220N Parameter Symbol Conditions Limit Unit Input Offset Voltage VOS 200 mV Max Input Offset Voltage Match VOS 300 mV Max Input Offset Current IOS VCM = 0 2 nA Max Input Bias Current IB VCM = 0 25 nA Max Input Voltage Range IVR VS = ±15 V –15/13.5 V Min Common-Mode CMRR V– = 0 V, V+ = 5 V, 0 V £ VCM £ 3.5 V 88 dB Min Rejection Ratio –15 V £ VCM £ 13.5 V, VS = ±15 V 93 Power Supply PSRR VS = ±2.5 V to ±15 V 12.5 mV/V Max Rejection Ratio V– = 0 V, V+ = 5 V to 30 V 22.5 Large-Signal AVO RL = 25 k W, VS = ±15 V 1000 V/mV Min Voltage Gain VO = ±10 V Output Voltage Swing VO V+ = 5 V, V– = 0 V, RL = 10 k W 0.7/4 V Min VS = ±15 V, RL = 25 kW±14 Supply Current ISY VS = ±2.5 V, No Load 125 mA Max (Both Amplifiers) VS = ±15 V, No Load 190 NOTE Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packing is not guaranteed for standard product dice. Consult factory to negotiate specifications based on die lot qualification through sample lot assembly and testing. (@ VS = 2.5 V, to 15 V, TA = 25 C, unless otherwise noted.) Package Type JA* JC Unit 8-Lead Hermetic DIP (Q) 148 16 ∞C/W 8-Lead Plastic DIP (N) 103 43 ∞C/W 8-Lead SOL (RN) 158 43 ∞C/W TO-99 (H) 150 18 ∞C/W * JA is specified for worst-case mounting conditions, i.e., JA is specified for device in socket for CERDIP and PDIP packages; JA is specified for device soldered to printed circuit board for SO packages. DIE CHARACTERISTICS DIE SIZE 0.097 INCH 0.063 INCH, 6111 SQ. MILS (2.464 mm 1.600 mm, 3.94 SQ. mm) NOTE : ALL V+ PADS ARE INTERNALL CONNECTED 1. INVERTING INPUT (A) 2. NONINVERTING INPUT (A) 3. BALANCE (A) 4. V– 5. BALANCE (B) 6. NONINVERTING INPUT (B) 7. INVERTING INPUT (B) 8. BALANCE (B) 9. V+ 10. OUT (B) 11. V+ 12. OUT (A) 13. V+ 14. BALANCE (A) ORDERING GUIDE TA = 25 ∞C Package Options Operating VOS MAX Temperature (mV) CERDIP Plastic TO-99 Range 150 OP220AZ * MIL 150 OP220EZ * IND 300 OP220FZ * IND 750 OP220CJ * MIL 750 OP220GZ * OP220GP* XIND 750 OP220GS XIND For military processed devices, please refer to the Mil Standard Data Sheet OP220AJ/883 *. *Not for new design. Obsolete April 2002. |
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Mô tả tương tự - OP220EZ |
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