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HCF4096BM1 bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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HCF4096BM1 bảng dữ liệu(HTML) 1 Page - STMicroelectronics |
1 / 13 page HCC/HCF4095B HCC/HCF4096B September 1988 GATE J-K MASTER-SLAVE FLIP-FLOPS EY (Plastic Package) DESCRIPTION ORDER CODES : HCC40XXBF HCF40XXBM1 HCF40XXBEY HCF40XXBC1 F (Ceramic Package) M1 (Micro Package) C1 (Chip Carrier) PIN CONNECTIONS The HCC4095B/4096B (extended temperature range) and HCF4095B/4096B (intermediate tem- perature range) are monolithic integrated circuits, available in 14 lead dual in-line plastic or ceramic package and plastic micropackage. The HCC/HCF4095B and HCC/HCF4096B are J-K Master-Slave Flip-Flops featuring separate AND gating of multiple J and K inputs. The gated J-K input control transfer of information into the master sec- tion during clocked operation. Information on the J-K . 16 MHz TOGGLE RATE (typ.) AT VDD -VSS = 10V . GATED INPUTS . QUIESCENT CURRENT SPECIFIED TO 20v FOR HCC DEVICE . 5V, 10V AND 15V PARAMETRIC RATINGS . INPUT CURRENTOF 100 nA AT 18V AND 25oC FOR HCC DEVICE . 100% TESTED FOR QUIESCENT CURRENT . MEETS ALL REQUIREMENTS OF JEDEC TEN- TATIVE STANDARD No 13 A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES” inputs is transferred to the Q and Q outputs on the positive edge of the clock pulse. SET and RESET inputs (active high) are provided for asynchronous operation. 4095B 4096B 1/13 |
Số phần tương tự - HCF4096BM1 |
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Mô tả tương tự - HCF4096BM1 |
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