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ADS5237 bảng dữ liệu(PDF) 5 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  Dual, 10-Bit, 65MSPS, 3.3V Analog-to-Digital Converter
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ADS5237 bảng dữ liệu(HTML) 5 Page - Texas Instruments

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ADS5237
SBAS420A – AUGUST 2007 – REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS (continued)
TMIN = –40°C and TMAX = +85°C. Typical values are at TA = +25°C, clock frequency = 65MSPS, 50% clock duty cycle,
AVDD = 3.3V, VDRV = 3.3V, transformer-coupled inputs, –1dBFS, ISET = 56.2kΩ, and internal voltage reference, unless
otherwise noted.
ADS5237
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUT
Differential input capacitance
3
pF
Analog input common-mode range
VCM ±0.05
V
Differential input voltage range
Internal reference
2.02
VPP
External reference
2.02
× (VREF
T – VREFB)
VPP
Voltage overload recovery time(8)
3
CLK
cycles
–3dBFS input, 25
Ω series
Input bandwidth
300
MHz
resistance
DIGITAL DATA INPUTS
Logic family
+3V CMOS Compatible
VIH High-level input voltage
VIN = 3.3V
2.2
V
VIL Low-level input voltage
VIN = 3.3V
0.6
V
CIN Input capacitance
3
pF
DIGITAL OUTPUTS
Data format
Straight offset binary(9)
Logic family
CMOS
Logic coding
Straight offset binary or BTC
Low output voltage (IOL = 50μA)
+0.4
V
High output voltage (IOH = 50μA)
+2.4
V
3-state enable time
2
Clocks
3-state disable time
2
Clocks
Output capacitance
3
pF
SERIAL INTERFACE
SCLK Serial clock input frequency
20
MHz
CONVERSION CHARACTERISTICS
Sample rate
20
65
MSPS
Data latency
6
CLK
cycles
(8)
A differential ON/OFF pulse is applied to the ADC input. The differential amplitude of the pulse in its ON (high) state is twice the
full-scale range of the ADC, while the differential amplitude of the pulse in its OFF (low) state is zero. The overload recovery time of the
ADC is measured as the time required by the ADC output code to settle within 1% of full-scale, as measured from its mid-code value
when the pulse is switched from ON (high) to OFF (low).
(9)
Option for binary two’s complement output.
Copyright © 2007, Texas Instruments Incorporated
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