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STI5202 bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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STI5202 bảng dữ liệu(HTML) 1 Page - STMicroelectronics |
1 / 9 page Data Brief For further information contact your local STMicroelectronics sales office. October 2007 Rev 1 1/9 9 STi5202 Low-cost set-top box decoder for H.264 and Microsoft VC1 Features ■ Single-chip, video decoder including – Linux®, Windows® CE and OS21 compatible ST40 CPU core: 266 MHz – Transport filtering and descrambling – Video decoder: VC-1 (including WMV 9), H.264 (MPEG-4 part 10) and MPEG-2 –SVP compliant –Windows Media™ DRM support – ST40 32-bit superscaler RISC CPU ■ Embedded interfaces – USB 2.0 host controller/PHY interface – DVI/HDMI™ output – Digital audio and video auxiliary inputs – Low-cost modem – 100BT ethernet controller with integrated MAC and MII/RMII interface for external PHY Description The STi5202 is a new generation, set-top box/DVD decoder chip, and provides very high performance for low-cost systems. STi5202 includes both VC1 and H.264 video decoders for new, low bit rate applications. . CP ST40 core 266 MHz UDI 16 K Icache MMU Int. control 32 K Dcache Digital video input DEI S/PDIF 2-ch PCM in SD video in DENC 3x SSCs 4x UARTs ILC 2x I/F SmCard 6x GPIO PWM MAFE interface IR Tx/Rx STBus Main video display FDMA AudioL TSmerger/router Display compositor 2D gamma blitter DACs Output stage Main video output (ED) YPbPr Aux video output (SD) YC/CVBS USB AudioR 2 x PDES Clock generator 5 x 2-ch PCM out Peripheral I/O and external interrupts TSIN0 NRSS-A TSIN1 TS I/O and system services DACs CUR 3 x GDP Aux video display Audio decoder and interfaces Audio DACs PTI Video decoder VC-1 (inc WMV 9) H264/MPEG-2 2.0 LMI 32 SDRAM DDR System ST231 core ST231 core Ethernet, MII/RMII MII/RMII for 100BT Ethernet EMI Flash or companion chip EMPI PTI Digital video output DVI-HDCP HDMI Main video output (ED) www.st.com |
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