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74AHCT86PW bảng dữ liệu(PDF) 1 Page - NXP Semiconductors |
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74AHCT86PW bảng dữ liệu(HTML) 1 Page - NXP Semiconductors |
1 / 14 page 1. General description The 74AHC86; 74AHCT86 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC86; 74AHCT86 provides a 2-input exclusive-OR function. 2. Features s Balanced propagation delays s All inputs have a Schmitt-trigger action s Inputs accepts voltages higher than VCC s For 74AHC86 only: operates with CMOS input levels s For 74AHCT86 only: operates with TTL input levels s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101C exceeds 1000 V s Multiple package options s Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information 74AHC86; 74AHCT86 Quad 2-input EXCLUSIVE-OR gate Rev. 02 — 15 November 2007 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC86D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74AHCT86D 74AHC86PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74AHCT86PW 74AHC86BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 74AHCT86BQ |
Số phần tương tự - 74AHCT86PW |
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Mô tả tương tự - 74AHCT86PW |
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