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ADS1174IPAPT bảng dữ liệu(PDF) 10 Page - Texas Instruments |
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ADS1174IPAPT bảng dữ liệu(HTML) 10 Page - Texas Instruments |
10 / 35 page www.ti.com FUNCTIONAL DESCRIPTION SAMPLING APERTURE MATCHING ADS1174 ADS1178 SBAS373 – OCTOBER 2007 Because the input signal is sampled at a very high rate, input signal aliasing does not occur until the The ADS1174 and ADS1178 are delta/sigma ADCs input signal frequency is at the modulator sampling consisting of independent converters that digitize rate. This high sampling rate greatly relaxes the input signals in parallel. The ADS1174 consists of requirement of external antialiasing filters allowing four independent converters, while the ADS1178 has very low passband phase errors. eight independent converters. The converter is composed of two main functional blocks to perform the ADC conversions: the The converters of the ADS1174/78 operate from the modulator and the digital filter. The modulator same CLK input. The CLK input controls the timing of samples the input signal together with sampling the the modulator sampling instant. The converter is reference voltage to produce a 1's density output designed such that the sampling skew, or modulator stream. The density of the output stream is sampling aperture match, between channels is proportional to the analog input level relative to the controlled to within 200ps. Furthermore, the digital reference voltage. The pulse stream is filtered by the filters are synchronized to start the convolution phase internal digital filter where the output conversion at the same modulator clock cycle. This design result is produced. results in excellent phase match among the In operation, the signal inputs and reference inputs ADS1174/78 channels. are sampled by the modulator at a high rate (typically The phase match of one four-channel ADS1174 to 64x higher than the final output data rate). The that of another ADS1174 may not have the same quantization noise of the modulator is moved to a degree of sampling match (the same is true for the higher frequency range where the internal digital filter 8-channel ADS1178). As a result of manufacturing removes it. This process results in very low levels of variations, differences in internal propagation delay of noise within the signal passband. the internal CLK signal coupled with differences of the arrival of the external CLK signal to each device may cause larger sampling match errors. Equal length CLK traces or external clock distribution devices can be used to control the arrival of the CLK signals to help reduce the sampling match error. 10 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): ADS1174 ADS1178 |
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