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STR710RZH6 bảng dữ liệu(PDF) 6 Page - STMicroelectronics

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System architecture
STR71xF
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4
System architecture
Package Choice: Low Pin-Count 64-pin or Feature-Rich 144-pin LQFP or BGA
The STR710 family is available in 5 main versions.
The 144-pin versions have the full set of all features including CAN, USB and External
Memory Interface (EMI).
STR710F: 144-pin BGA or LQFP with CAN, USB and EMI
STR710R: Flashless 144-pin BGA or LQFP with CAN, USB and EMI (no internal Flash
memory)
The three 64-pin versions (BGA or LQFP) do not include External Memory Interface.
STR715F: 64-pin BGA or LQFP without CAN or USB
STR711F: 64-pin BGA or LQFP with USB
STR712F: 64-pin BGA or LQFP with CAN
High Speed Flash Memory (STR71xF)
The Flash program memory is organized in two banks of 32-bit wide Burst Flash memories
enabling true read-while-write (RWW) operation. Device Bank 0 is up to 256 Kbytes in size,
typically for the application program code. Bank 1 is 16K bytes, typically used for storing
data constants. Both banks are accessed by the CPU with zero wait states @ 33 MHz
Bank 0 memory endurance is 10K write/erase cycles and Bank 1 endurance is 100K
write/erase cycles. Data retention is 20 years at 85°C on both banks. The two banks can be
accessed independently in read or write. Flash memory can be accessed in two modes:
Burst mode: 64-bit wide memory access at up to 50 MHz.
Direct 32-bit wide memory access for deterministic operation at up to 33 MHz.
The STR7 embedded Flash memory can be programmed using In-Circuit Programming or
In-Application programming.
IAP (In-Application Programming): The IAP is the ability to re-program the Flash memory
of a microcontroller while the user program is running.
ICP (In-Circuit Programming): The ICP is the ability to program the Flash memory of a
microcontroller using JTAG protocol while the device is mounted on the user application
board.
The Flash memory can be protected against different types of unwanted access
(read/write/erase). There are two types of protection:
Sector Write Protection
Flash Debug Protection (locks JTAG access)
Refer to the STR7 Flash Programming Reference manual for details.
Optional External Memory (STR710)
The non-multiplexed 16-bit data/24-bit address bus available on the STR710 (144-pin)
supports four 16-Mbyte banks of external memory. Wait states are programmable
individually for each bank allowing different memory types (Flash, EPROM, ROM, SRAM
etc.) to be used to store programs or data.
Figure 1 shows the general block diagram of the device family.


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