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MC145040DW bảng dữ liệu(PDF) 9 Page - LANSDALE Semiconductor Inc. |
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MC145040DW bảng dữ liệu(HTML) 9 Page - LANSDALE Semiconductor Inc. |
9 / 12 page www.lansdale.com Page 9 of 12 Issue A LANSDALE Semiconductor, Inc. ML145040, ML145041 DESCRIPTION This example application of the ML145040/ML145041 ADCs interfaces three controllers to a microprocessor and processes data in real–time for a video game. The standard joy- stick X–axis (left/right) and Y–axis (up/down) controls as well as engine thrust controls are accommodated Figure 13 illustrates how the ML145040/ML145041 is used as a cost–effective means to simplify this type of circuit design. Utilizing one ADC, three controllers are interfaced to a CMOS or NMOS microprocessor with a serial peripheral inter- face (SP) port. Processors with National Semiconductor’s MICROWIRE serial port may also be used. Full duplex opera- tion optimizes throughput for this system. DIGITAL DESIGN CONSIDERATIONS Motorola’s MC68HC05C4 CMOS MCU may be chosen to reduce power supply size and cost. The NMOS MCUs may be used if power consumption is not critical. A VDD to VSS 0.1 µF bypass capacitor should be closely mounted to the ADC. Both the ML145040 and ML145041 will accommodate all the analog system inputs. The ML145040, when used with a 2 MHz MCU, takes 24 µs to sample the analog input, perform the conversion, and transfer the serial data at 1 MHz. Thirty–two A/D Clock cycles (2 MHz at input pin 19) must be provided and counted by the MCU after the eighth SCLK before reading the ADC results. The ML145041 has the end–of–conversion (EOC) signal (at output pin 19) to define when data is ready, but has a slower 40 µs cycle time. However, the 40 µs is constant for serial data rates of 1 MHz independent of the MCU clock frequency. Therefore, the ML145041 may be used with CMOS MCU operating at the reduced clock rates to minimize power consumption without sacrificing ADS cycle times, with EOC being used to generate an interrupt. The ML145041 may also be used with MCU’s which do not provide a system clock.) ANALOG DESIGN CONSIDERATIONS Controllers with output impedances of less than 10 kilohms may be direcly interfaced to these ADCs, eliminating the need for buffer amplifiers. Separate lines connect the Vref and VAG pins on the ADC with the controllers to provide isolation from system noise. Although not indicated in Figure 13, the Vref and controller ouput lines may need to be shielded, depending on their length and electrical environment. This should be verified during pro- totyping with an oscilloscope. If shielding is required, a twist- ed pair or foil–shielded wire (not coax) is appropriate for this low frequency application. One wire of the pair of the shield must be VAG. A reference circuit voltage of 5 volts is used for this applica- tion. The reference circuitry may be as simple as tying VAG to system ground and Vref to the system’s positive supply. (See Figure 14.) However, the system power supply noise may require that a seperate supply be used for the voltage reference. This supply must provide source current for Vref as well as current for the controller potentionmeters. A bypass capacitor across the Vref and VAG pins is recom- mended. These pins are adjacent on the ADC package which facilitates mounting the capacitor very close to the ADC. SOFTWARE CONSIDERATIONS The software flow for acquisition is straightforward. The nine analog inputs, AN0 through AN8, are scanned by read- ing the analog value of the previously addressed channel into the MCU and sending the address of the next channel to to be read to the ADC, simultaneously. All nine inputs may be scanned in a minimum of 216 µs (ML145040) or 360 µs (ML145041). If the design in realized using the ML145040, 32 A/D clock cycles (at pin 19) must be counted by the MCU to allow time for A/D conversion. The designer utilizing the ML145041 has the end–of–conversion signal (at pin 19) to define the conver- sion interval. EOC may be used to generated an interrupt, which is serviced by reading the serial data from the ADC. The software flow should then process and format the data, and transfer the information to the video circuitry for updating the display. Legacy Applications Information |
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