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ADC78H89CIMTX bảng dữ liệu(PDF) 5 Page - National Semiconductor (TI) |
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ADC78H89CIMTX bảng dữ liệu(HTML) 5 Page - National Semiconductor (TI) |
5 / 16 page ADC78H89 Timing Specifications The following specifications apply for AV DD =DVDD = +2.7V to 5.25V, fSCLK = 8 MHz, CL =50pF, Boldface limits apply for T A =TMIN to TMAX: all other limits TA = 25˚C. Symbol Parameter Conditions Typical Limits Units t 1a SCLK High to CS Fall Setup Time (Note 10) 10 ns (min) t 1b SCLK Low to CS Fall Hold Time (Note 10) 10 ns (min) t 2 Delay from CS Until DOUT TRI-STATE® Disabled 30 ns (max) t 3 Data Access Time after SCLK Falling Edge 30 ns (max) t 4 Data Setup Time Prior to SCLK Rising Edge 10 ns (max) t 5 Data Valid SCLK Hold Time 10 ns (max) t 6 SCLK High Pulse Width 0.4 x t SCLK ns (min) t 7 SCLK Low Pulse Width 0.4 x t SCLK ns (min) t 8 CS Rising Edge to DOUT High-Impedance 20 ns (max) Note 1: Absolute maximum ratings are limiting values which indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified. Note 3: When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND or VIN > VA or VD), the current at that pin should be limited to 10 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to five. Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the junction-to-ambient thermal resistance ( θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX=(TJmax − TA)/θJA. The values for maximum power dissipation listed above will be reached only when the ADC78H89 is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k Ω resistor. Machine model is 220 pF discharged through ZERO ohms. Note 6: See AN450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National Semiconductor Linear Data Book, for other methods of soldering surface mount devices. Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 8: Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis. Note 9: Except power supply pins. Note 10: Clock may be in any state (high or low) when CS is asserted, with the restrictions on setup and hold time given by t1a and t1b. www.national.com 5 |
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