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TP5322K1 bảng dữ liệu(PDF) 1 Page - Supertex, Inc

tên linh kiện TP5322K1
Giải thích chi tiết về linh kiện  P-Channel Enhancement-Mode Vertical DMOS FETs
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nhà sản xuất  SUTEX [Supertex, Inc]
Trang chủ  http://www.supertex.com
Logo SUTEX - Supertex, Inc

TP5322K1 bảng dữ liệu(HTML) 1 Page - Supertex, Inc

  TP5322K1 Datasheet HTML 1Page - Supertex, Inc TP5322K1 Datasheet HTML 2Page - Supertex, Inc  
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TP5322
General Description
The Supertex TP5322 is a low threshold enhancement-
mode (normally-off) transistor utilizing an advanced vertical
DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces a device
with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all
MOS structures, this device is free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
BV
DSS
Drain-to-gate voltage
BV
DGS
Gate-to-source voltage
±20V
Operating and storage temperature
-55OC to +150OC
Soldering temperature3
300OC
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
3Distance of 1.6mm from case for 10 seconds.
Ordering Information
Package Options
BV
DSS /BVDGS
R
DS(ON)
(max)
V
GS(TH)
(max)
I
D(ON)
(min)
TO-236AB1
TO-243AA2
TP5322K1
TP5322N8
-220V
12Ω
-2.4V
-0.7A
TP5322K1-G
TP5322N8-G
-G indicates package is RoHS compliant (‘Green’)
Notes: 1Same as SOT-23, 2Same as SOT-89.
P-Channel Enhancement-Mode
Vertical DMOS FETs
Pin Configurations
TO-243AA
(top view)
G
D
S
D
Product marking for TO-243AA:
where
= 2-week alpha date code
TP3C
Product marking for TO-236AB:
where
= 2-week alpha date code
P3C
TO-236AB
(Top View)
Gate
Source
Drain
Features
High input impedance
Low threshold
Low input capacitance
Fast switching speeds
Low on resistance
Low input and output leakage
Free from secondary breakdown
Complementary N- and P-channel devices
Applications
Logic level interfaces - ideal for TTL and CMOS
Battery operated systems
Photo voltaic devices
Analog switches
General purpose line drivers
Telecom switches


Số phần tương tự - TP5322K1

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
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Mô tả tương tự - TP5322K1

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