SN54ACT8990, SN74ACT8990

TEST-BUS CONTROLLERS

IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 16-BIT GENERIC HOST INTERFACES

SCAS190E – JUNE 1990 – REVISED JANUARY 1997

5

POST OFFICE BOX 655303

Terminal Functions

TERMINAL NAME

I/O

DESCRIPTION

ADRS4 – ADRS0

I

Address inputs. ADRS4 – ADRS0 form the 5-bit address bus that interfaces the TBC to its host. These inputs

specify the TBC register to be read from or written to.

DATA15 – DATA0

I/O

Data inputs and outputs. DATA15 – DATA0 form the 16-bit bidirectional data bus that interfaces the TBC to its

host. Data is read from or written to the TBC register using this data bus.

GND

Ground

INT

O

Interrupt. INT transmits an interrupt signal to the host. When the TBC requires service from the host, INT is

asserted (low). INT will remain asserted (low) until the host has completed the required service.

NC

No connection

RD

I

Read strobe. RD is the active low output enable for the data bus. RD is used as the strobe for reading data from

the selected TBC register.

RDY

O

Ready. RDY transmits a status signal to the host. When the TBC is ready to accept a read or write operation

from the host, RDY is asserted (low). RDY is not asserted (high) when the TBC is in recovery from a read, write,

command, or reset operation.

TCKI

I

Test clock input. TCKI is the clock input for the TBC. Most operations of the TBC are synchronous to TCKI.

When enabled, all target interface outputs change on the falling edge of TCKI. Sampling of target interface

inputs are configured to occur on either the rising edge or falling edge of TCKI.

TCKO

O

Test clock output. TCKO distributes TCK to the target(s). The TCKO is configured to be disabled, constant zero,

constant one, or to follow TCKI. When TCKO follows TCKI, it is delayed to match the delay of generating the

TDO and TMS signals.

TDI1 – TDI0

I

Test data inputs. The TDI1 – TDI0 serial inputs are used for shifting test data from the target(s). The TDI inputs

can be directly connected to the TDO pin(s) of the target(s).

TDO

O

Test data output. TDO is used for shifting test data into the target(s). TDO can be directly connected to the TDI

terminal(s) of the target(s).

TMS1 – TMS0

O

Test mode select outputs. These parallel outputs transmit TMS signals to the target(s), which direct them

through their TAP controller states. TMS1 – TMS0 can be directly connected to the TMS terminals of the

target(s).

TMS5 – TMS2/

EVENT3 – EVENT0

I/O

Test mode select outputs or event inputs/outputs. These I/Os can be configured for use as either TMS outputs

or event inputs/outputs. As TMS outputs, they function similarly to TMS1 – TMS0 above. As event I/Os, they

can be used to receive/transmit interrupt signals to/from the target(s).

TOFF

I

Test-off input. TOFF is the active low output disable for all outputs and I/Os of the target interface (TCKO, TDO,

TMS, TMS/EVENT).

TRST

I

Test-reset input. TRST is used to initiate hardware and software reset operations of the TBC. Hardware reset

begins when TRST is asserted (low). Software reset begins when TRST is released (high) and proceeds

synchronously to TCKI to completion in a predetermined number of cycles.

WR

I

Write input. WR is the strobe for writing data to a TBC data register. Signals present at the data and address

buses are captured on the rising edge of WR.

VCC

Supply voltage