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TSA5060AT bảng dữ liệu(PDF) 5 Page - NXP Semiconductors |
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TSA5060AT bảng dữ liệu(HTML) 5 Page - NXP Semiconductors |
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5 / 24 page  2000 Oct 24 5 Philips Semiconductors Product specification 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer TSA5060A PINNING SYMBOL PIN DESCRIPTION CP 1 charge pump output XTAL 2 crystal oscillator input XT/COMP 3 fxtal or fcomp signal output AS 4 I2C-bus address selection input SDA 5 I2C-bus serial data input/output SCL 6 I2C-bus serial clock input P3 7 general purpose output Port 3 P2 8 general purpose input/output Port 2 P1 9 general purpose input/output Port 1 P0 10 general purpose input/output Port 0 ADC 11 analog-to-digital converter input VCC 12 supply voltage RFA 13 RF signal input A RFB 14 RF signal input B GND 15 ground DRIVE 16 external NPN drive output handbook, halfpage TSA5060A FCE718 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 CP XTAL XT/COMP AS SDA SCL P3 P2 P1 P0 ADC VCC RFA RFB GND DRIVE Fig.2 Pin configuration. FUNCTIONAL DESCRIPTION The TSA5060A contains all the necessary elements except a reference source, a loop filter and an external NPN transistor to control a varicap tuned local oscillator forming a phase locked loop frequency synthesized source. The IC is designed in a high speed process with a fast phase detector to allow a high comparison frequency to reach a low phase noise level on the oscillator. The block diagram is shown in Fig.1. The RF signal is applied at pins RFA and RFB. The input preamplifier provides a good sensitivity. The output of the preamplifier is fed to the 17-bit programmable divider either through a divide-by-two prescaler or directly. Because of the internal high speed process, the RF divider is working at a frequency up to 1.3 GHz, without the need for the divide-by-two prescaler to be used. The output of the 17-bit programmable divider fDIV is fed into the phase comparator, where it is compared in both phase and frequency with the comparison frequency fcomp. This frequency is derived from the signal present at pin XTAL, fxtal, divided down in the reference divider. It is possible either to connect a quartz crystal to pin XTAL and then using the on-chip crystal oscillator, or to feed this pin with a reference signal from an external source. The reference divider can have a dividing ratio selected from 16 different values between 2 and 320, including the ratio 24 to cope with the offset requirement of the UK-DTT system, see Table 8. The output of the phase comparator drives the charge pump and the loop amplifier section. This amplifier requires the use of an external NPN transistor. Pin CP is the output of the charge pump, and pin DRIVE is connected to the base of the external transistor. This transistor has its emitter grounded and the collector drives the tuning voltage to the varicap diode of the Voltage Controlled Oscillator (VCO). The loop filter has to be connected between pin CP and the collector of the external NPN transistor (see Fig.4). It is also possible to drive another PLL synthesizer, or the clock input of a digital demodulation IC, from pin XT/COMP. It is possible to select by software either fxtal, the crystal oscillator frequency or fcomp, the frequency present after the reference divider. It is also possible to switch off this output, in case it is not used. For test and alignment purposes, it is possible to release the drive output to be able to apply an external voltage on it, to select one of the three charge pump test modes, and to monitor half the fDIV at Port P0. See Table 10 for all possible modes. Four open-collector output ports are provided on the IC for general purpose; three of these can also be used as input ports. A 3-bit ADC is also available. |
Số phần tương tự - TSA5060AT |
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Mô tả tương tự - TSA5060AT |
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