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STK15C68-SF25I bảng dữ liệu(PDF) 9 Page - Simtek Corporation

tên linh kiện STK15C68-SF25I
Giải thích chi tiết về linh kiện  32Kx8 PowerStore nvSRAM
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nhà sản xuất  SIMTEK [Simtek Corporation]
Trang chủ  http://www.simtek.com
Logo SIMTEK - Simtek Corporation

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9
STK15C88
February, 2007
Document Control #ML0016 Rev 0.3
Internally, RECALL is a two-step procedure. First,
the SRAM data is cleared, and second, the nonvola-
tile information is transferred into the SRAM cells.
After the t
RECALL cycle time the SRAM will once again
be ready for READ and WRITE operations. The
RECALL
operation in no way alters the data in the
nonvolatile elements. The nonvolatile data can be
recalled an unlimited number of times.
AutoStoreTM OPERATION
The STK15C88 uses the intrinsic system capaci-
tance to perform an automatic STORE on power
down. As long as the system power supply takes at
least t
STORE to decay from VSWITCH down to 3.6V, the
STK15C88 will safely and automatically store the
SRAM
data in nonvolatile elements on power down.
In order to prevent unneeded STORE operations,
automatic STOREs will be ignored unless at least
one WRITE operation has taken place since the
most recent STORE or RECALL cycle. Software-
initiated STORE cycles are performed regardless of
whether a WRITE operation has taken place. Addi-
tional information may be found in applications note
“Applying
the
STK11C88,
STK15C88
and
STK16C88 32K nvSRAM.”
POWER-UP RECALL
During power up, or after any low-power condition
(V
CC < VRESET), an internal RECALL request will be
latched. When V
CC once again exceeds the sense
voltage of V
SWITCH, a RECALL cycle will automatically
be initiated and will take t
RESTORE to complete.
If the STK15C88 is in a WRITE state at the end of
power-up RECALL, the SRAM data will be corrupted.
To help avoid this situation, a 10K Ohm resistor
should be connected either between W and system
V
CC or between E and system VCC.
HARDWARE PROTECT
The STK15C88 offers hardware protection against
inadvertent STORE operation and SRAM WRITEs
during low-voltage conditions. When V
CC < VSWITCH,
all software STORE operations and SRAM WRITEs
are inhibited.
LOW AVERAGE ACTIVE POWER
The STK15C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 2
shows the relationship between I
CC and READ cycle
time. Worst-case current consumption is shown for
both CMOS and TTL input levels (commercial tem-
perature range, V
CC = 5.5V, 100% duty cycle on chip
enable). Figure 3 shows the same relationship for
WRITE
cycles. If the chip enable duty cycle is less
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK15C88 depends on the following items:
1) CMOS vs. TTL input levels; 2) the duty cycle of
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of READs to WRITEs; 5) the operating
temperature; 6) the V
CC level; and 7) I/O loading.
Figure 2: ICC (max) Reads
0
20
40
60
80
100
50
100
150
200
Cycle Time (ns)
TTL
CMOS
Figure 3: ICC (max) Writes
0
20
40
60
80
100
50
100
150
200
Cycle Time (ns)
TTL
CMOS


Số phần tương tự - STK15C68-SF25I

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
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