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MCP2140 bảng dữ liệu(PDF) 9 Page - Microchip Technology |
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MCP2140 bảng dữ liệu(HTML) 9 Page - Microchip Technology |
9 / 38 page © 2007 Microchip Technology Inc. Preliminary DS21894C-page 9 MCP2122 2.5.3 ENCODING AND SCREEN CAPTURES Table 2-4 shows the TXIR pin high-time at different common baud rates. The internal TXIR pulse-width high-time limiter is a feature that minimizes the system current consumption at lower baud rates. The IrDA standard specification requires that optical receiver cir- cuitry detect pulses as narrow as 1.41 µs (1.63 µs is the typical time at 115200 baud). Therefore, the time that the TXIR pin is high after this valid detection is additional current that is driven by the emitter LED. The MCP2122 will force the TXIR pin low once the pulse- width limiter has timed out. Figure 2-9 shows the MCP2122 16XCLK, TX and TXIR waveforms at 115200 baud for a single TX low bit. In this case, the TXIR is high for three 16XCLK pulses. In Figure 2-10, the MCP2122 is at 9600 baud for a single TX low bit. In this case, the TXIR is high for 3.55 µs (determined by pulse-width limiter circuit). TABLE 2-4: TXIR HIGH PULSE WIDTH FIGURE 2-9: MCP2122 AT 115200 BAUD WAVEFORM Baud Rate TXIR Pulse Width 3xT16XCLK Circuit Pulse-width Limiter (2) Circuit Actual Pulse Width 9600 19.53 µs (1) 4.00 µs 4.00 µs (3) 19200 9.77 µs (1) 4.00 µs 4.00 µs (3) 38400 4.88 µs (1) 4.00 µs 4.00 µs (3) 57600 3.26 µs 4.00 µs 3.26 µs 115200 1.63 µs 4.00 µs 1.63 µs Note 1: The pulse-width limiter on the TXIR pin saves system current for this baud rate. 2: This TXIR pulse width time is a design target and is not tested. Actual times may be greater than, or less than, this value. 3: This time (determined by the pulse-width limiter circuit) is device dependent. 1 2 3 4 5 678 9 10 11 12 13 14 15 16 Jitter of the TX input relative to the 16XCLK and TXIR 16XCLK Pulse AB TXIR |
Số phần tương tự - MCP2140 |
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Mô tả tương tự - MCP2140 |
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