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SM320F2812 bảng dữ liệu(PDF) 10 Page - Texas Instruments |
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SM320F2812 bảng dữ liệu(HTML) 10 Page - Texas Instruments |
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10 / 138 page  Introduction 10 December 2004 − Revised September 2006 SGUS053B Table 2−2. Signal Descriptions† (Continued) NAME DESCRIPTION PU/PD§ I/O/Z‡ PIN NO. NAME DESCRIPTION PU/PD§ I/O/Z‡ 172-PIN HFG ADC ANALOG INPUT SIGNALS ADCINA7 163 I ADCINA6 164 I ADCINA5 165 I ADCINA4 166 I Eight-channel analog inputs for Sample-and-Hold A. The ADC pins should not ADCINA3 167 I Eight-channel analog inputs for Sample-and-Hold A. The ADC pins should not be driven before VDDA1, VDDA2, and VDDAIO pins have been fully powered up. ADCINA2 168 I be driven before VDDA1, VDDA2, and VDDAIO pins have been fully powered up. ADCINA1 169 I ADCINA0 170 I ADCINB7 9 I ADCINB6 8 I ADCINB5 7 I Eight-channel analog inputs for Sample-and-Hold B. The ADC pins should not ADCINB4 6 I Eight-channel analog inputs for Sample-and-Hold B. The ADC pins should not be driven before the VDDA1, VDDA2, and VDDAIO pins have been fully powered ADCINB3 5 I be driven before the VDDA1, VDDA2, and VDDAIO pins have been fully powered up. ADCINB2 4 I up. ADCINB1 3 I ADCINB0 2 I ADCREFP 11 O ADC Voltage Reference Output (2 V). Requires a low ESR (50 m Ω − 1.5 Ω) ceramic bypass capacitor of 10 µF to analog ground. (Can accept external reference input (2 V) if the software bit is enabled for this mode. 1- µF to 10-µF low ESR capacitor can be used in the external reference mode.) ADCREFM 10 O ADC Voltage Reference Output (1 V). Requires a low ESR (50 m Ω − 1.5 Ω) ceramic bypass capacitor of 10 µF to analog ground. (Can accept external reference input (1 V) if the software bit is enabled for this mode. 1- µF to 10-µF low ESR capacitor can be used in the external reference mode.) ADCRESEXT 16 O ADC External Current Bias Resistor (24.9 k Ω ±5%) ADCBGREFIN 160 I Test Pin. Reserved for TI. Must be left unconnected. AVSSREFBG 12 I ADC Analog GND AVDDREFBG 13 I ADC Analog Power (3.3 V) ADCLO 171 I Common Low Side Analog Input. Connect to analog ground. VSSA1 15 I ADC Analog GND VSSA2 161 I ADC Analog GND VDDA1 14 I ADC Analog 3.3-V Supply VDDA2 162 I ADC Analog 3.3-V Supply VSS1 159 I ADC Digital GND VDD1 158 I ADC Digital 1.8-V (or 1.9-V) Supply VDDAIO 1 3.3-V Analog I/O Power Pin VSSAIO 172 Analog I/O Ground Pin † Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA. ‡ I = Input, O = Output, Z = High impedance § PU = pin has internal pullup; PD = pin has internal pulldown |
Số phần tương tự - SM320F2812 |
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Mô tả tương tự - SM320F2812 |
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