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TC10733.6VCT713 bảng dữ liệu(PDF) 11 Page - Microchip Technology

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Giải thích chi tiết về linh kiện  50mA and 100mA CMOS LDOs with Shutdown, ERROR Output and VREF Bypass
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© 2007 Microchip Technology Inc.
DS21354D-page 11
TC1072/TC1073
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
3.1
Input Voltage Supply (VIN)
Connect unregulated input supply to the VIN pin. If
there is a large distance between the input supply and
the LDO regulator, some input capacitance is
necessary for proper operation. A 1 µF capacitor
connected from VIN to ground is recommended for
most applications.
3.2
Ground (GND)
Connect the unregulated input supply ground return to
GND. Also connect the negative side of the 1 µF typical
input decoupling capacitor close to GND and the
negative side of the output capacitor COUT to GND.
3.3
Shutdown Control Input (SHDN)
The regulator is fully enabled when a logic-high is
applied to SHDN. The regulator enters shutdown when
a logic-low is applied to SHDN. During shutdown,
output voltage falls to zero, ERROR is open-circuited
and supply current is reduced to 0.5 µA (maximum).
3.4
Out-Of-Regulation Flag (ERROR)
ERROR goes low when VOUT is out-of-tolerance by
approximately – 5%.
3.5
Reference Bypass Input (Bypass)
Connecting a 470 pF to this input further reduces
output noise.
3.6
Regulated Voltage Output (VOUT)
Connect the output load to VOUT of the LDO. Also
connect the positive side of the LDO output capacitor
as close as possible to the VOUT pin.
Pin No.
(6-Pin SOT-23)
Symbol
Description
1VIN
Unregulated supply input.
2
GND
Ground terminal.
3
SHDN
Shutdown control input.
4ERROR
Out-of-Regulation Flag. (Open drain output).
5
Bypass
Reference bypass input.
6VOUT
Regulated voltage output.


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