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74ALVTH16827DLG4 bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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74ALVTH16827DLG4 bảng dữ liệu(HTML) 1 Page - Texas Instruments |
1 / 16 page SN54ALVTH16827, SN74ALVTH16827 2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCES076E – JULY 1996 – REVISED DECEMBER 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D State-of-the-Art Advanced BiCMOS Technology (ABT) Widebus ™ Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation D Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC) D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C D High Drive (–24/24 mA at 2.5-V and –32/64 mA at 3.3-V VCC) D Power Off Disables Outputs, Permitting Live Insertion D High-Impedance State During Power Up and Power Down Prevents Driver Conflict D Uses Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating D Auto3-State Eliminates Bus Current Loading When Output Exceeds VCC + 0.5 V D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model; and Exceeds 1000 V Using Charged-Device Model, Robotic Method D Flow-Through Architecture Facilitates Printed Circuit Board Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package description The ’ALVTH16827 devices are 20-bit buffers/line drivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The devices are composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1 and 1OE2, or 2OE1 and 2OE2) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1998, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments Incorporated. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE1 1Y1 1Y2 GND 1Y3 1Y4 VCC 1Y5 1Y6 1Y7 GND 1Y8 1Y9 1Y10 2Y1 2Y2 2Y3 GND 2Y4 2Y5 2Y6 VCC 2Y7 2Y8 GND 2Y9 2Y10 2OE1 1OE2 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 1A7 GND 1A8 1A9 1A10 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2A9 2A10 2OE2 SN54ALVTH16827 . . . WD PACKAGE SN74ALVTH16827 . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) |
Số phần tương tự - 74ALVTH16827DLG4 |
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Mô tả tương tự - 74ALVTH16827DLG4 |
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