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KMPC860DEZQ50D4 bảng dữ liệu(PDF) 5 Page - Freescale Semiconductor, Inc

tên linh kiện KMPC860DEZQ50D4
Giải thích chi tiết về linh kiện  Hardware Specifications
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KMPC860DEZQ50D4 bảng dữ liệu(HTML) 5 Page - Freescale Semiconductor, Inc

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MPC860 Family Hardware Specifications, Rev. 7
Freescale Semiconductor
5
Maximum Tolerated Ratings
— Multiple-master environment support
Time-slot assigner (TSA)
— Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation
— Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined
— 1- or 8-bit resolution
— Allows independent transmit and receive routing, frame synchronization, and clocking
— Allows dynamic changes
— Can be internally connected to six serial channels (four SCCs and two SMCs)
Parallel interface port (PIP)
— Centronics interface support
— Supports fast connection between compatible ports on the MPC860 or the MC68360
PCMCIA interface
— Master (socket) interface, release 2.1 compliant
— Supports two independent PCMCIA sockets
— Supports eight memory or I/O windows
Low power support
— Full on—all units fully powered
— Doze—core functional units disabled except time base decrementer, PLL, memory controller, RTC, and
CPM in low-power standby
— Sleep—all units disabled except RTC and PIT, PLL active for fast wake up
— Deep sleep—all units disabled including PLL except RTC and PIT
— Power down mode—all units powered down except PLL, RTC, PIT, time base, and decrementer
Debug interface
— Eight comparators: four operate on instruction address, two operate on data address, and two operate on
data
— Supports conditions: =
≠ < >
— Each watchpoint can generate a break-point internally.
3.3-V operation with 5-V TTL compatibility except EXTAL and EXTCLK
357-pin ball grid array (BGA) package
3
Maximum Tolerated Ratings
This section provides the maximum tolerated voltage and temperature ranges for the MPC860. Table 2 provides the
maximum ratings.
This device contains circuitry protecting against damage due to high-static voltage or electrical fields; however, it
is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages
to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic
voltage level (for example, either GND or Vdd).


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