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MCF5232CAB80 bảng dữ liệu(PDF) 4 Page - Freescale Semiconductor, Inc |
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MCF5232CAB80 bảng dữ liệu(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 46 page MCF523x Integrated Microprocessor Hardware Specification, Rev. 2 Signal Descriptions Freescale Semiconductor 4 4 Signal Descriptions This section describes signals that connect off chip, including a table of signal properties. For a more detailed discussion of the MCF523x signals, consult the MCF5235 Reference Manual (MCF5235RM). 4.1 Signal Properties Table 2 lists all of the signals grouped by function. The “Dir” column is the direction for the primary function of the pin. Refer to Section 6, “Mechanicals/Pinouts and Part Numbers,” for package diagrams. NOTE In this table and throughout this document a single signal within a group is designated without square brackets (i.e., A24), while designations for multiple signals within a group use brackets (i.e., A[23:21]) and is meant to include all signals within the two bracketed numbers when these numbers are separated by a colon. NOTE The primary functionality of a pin is not necessarily its default functionality. Pins that are muxed with GPIO will default to their GPIO functionality. Table 2. MCF523x Signal Information and Muxing Signal Name GPIO Alternate 1 Alternate 2 Dir.1 MCF5232 160 QFP MCF5232 196 MAPBGA MCF5233 256 MAPBGA MCF5234 256 MAPBGA MCF5235 256 MAPBGA Reset RESET — — — I 83 N13 T15 T15 T15 RSTOUT — — — O 82 P13 T14 T14 T14 Clock EXTAL — — — I 86 M14 P16 P16 P16 XTAL — — — O 85 N14 R16 R16 R16 CLKOUT — — — O 89 K14 M16 M16 M16 Mode Selection CLKMOD[1:0] — — — I 19,20 G5, H5 J3, J2 J3, J2 J3, J2 RCON — — — I 79 K10 P13 P13 P13 External Memory Interface and Ports A[23:21] PADDR[7:5] CS[6:4] — O 126, 125, 124 B11, C11, D11 B14, C14, A15 B14, C14, A15 B14, C14, A15 |
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