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MCF5208 bảng dữ liệu(PDF) 28 Page - Freescale Semiconductor, Inc |
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MCF5208 bảng dữ liệu(HTML) 28 Page - Freescale Semiconductor, Inc |
28 / 46 page MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 1 Electrical Characteristics Freescale Semiconductor 28 5.7.1.1 FlexBus AC Timing Characteristics The following timing numbers indicate when data will be latched or driven onto the external bus, relative to the system clock. Figure 14. FlexBus Read Timing Table 11. FlexBus AC Timing Specifications Num Characteristic Symbol Min Max Unit Notes Frequency of Operation 83.33 Mhz fsys/2 FB1 Clock Period (FB_CLK) tFBCK 12 ns tcyc FB2 Data, and Control Output Valid (A[23:0], D[31:0], FB_CS[5:0], R/W, TS, BE/BWE[3:0] and OE) tFBCHDCV —7.0 ns 1 NOTES: 1 Timing for chip selects only applies to the FB_CS[5:0] signals. Please see Section 5.8, “SDRAM Bus” for SD_CS[1:0] timing. FB3 Data, and Control Output Hold ((A[23:0], D[31:0], FB_CS[5:0], R/W, TS, BE/BWE[3:0], and OE) tFBCHDCI 1— ns 1, 2 2 The FlexBus supports programming an extension of the address hold. Please consult the device reference manual for more information. FB4 Data Input Setup tDVFBCH 3.5 — ns FB5 Data Input Hold tDIFBCH 0— ns FB6 Transfer Acknowledge (TA) Input Setup tCVFBCH 4— ns FB7 Transfer Acknowledge (TA) Input Hold tCIFBCH 0— ns FB_CLK A[23:0] D[31:0] R/W TS FB_CSn OE TA FB1 A[23:0] FB2 FB3 FB4 FB5 FB6 FB7 DATA BE/BWEn |
Số phần tương tự - MCF5208_07 |
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Mô tả tương tự - MCF5208_07 |
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