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MCZ33395EW bảng dữ liệu(PDF) 10 Page - Freescale Semiconductor, Inc |
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MCZ33395EW bảng dữ liệu(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 16 page  Analog Integrated Circuit Device Data 10 Freescale Semiconductor 33395 FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION GATE DRIVE CIRCUITS The gate drive outputs (GDH1, GDH2, etc.) supply the peak currents required to turn ON and hold ON the MOSFETs, as well as turn OFF and hold OFF the MOSFETs. CHARGE PUMP The current capability of the charge pump is sufficient to supply the gate drive circuit’s demands when PWMing at up to 28 kHz. Two external charge pump capacitors and a reservoir capacitor are required to complete the charge pump’s circuitry. Charge reservoir capacitance is a function of the total MOSFET gate charge (QG) gate drive voltage level relative to the source (VGS) and the allowable sag of the drive level during the turn-on interval (VSAG). CRES can be expressed by the following formula: For example, for QG = 60 nC, VGS = 14 V, VSAG = 0.2 V: Proper charge pump capacitance is required to maintain, and provide for, adequate gate drive during high demand turn-ON intervals. Use the following formula to determine values for CP1 and CP2: For example, for the above determination of CRES = 0.15 µF: By averaging these two values, the proper CPn value can be determined: CP1 and CP2 =(0.0075 µF + 0.015 µF) ÷ 2 = 0.01 µF THERMAL SHUTDOWN FUNCTION The device has internal temperature sensing circuitry which activates a protective shutdown function should the die reach excessively elevated temperatures. This function effectively limits power dissipation and thus protects the device. OVERVOLTAGE SHUTDOWN FUNCTION When the supply voltage (VIGN) exceeds the specified over- voltage shutdown level, the part will automatically shut down to protect both internal circuits as well as the load. Operation will resume upon return of VIGN to normal operating levels. LOW VOLTAGE RESET FUNCTION When the logic supply voltage (VDD) drops below the minimum voltage level or when the part is initially powered up, this function will turn OFF and hold OFF the external MOSFETs until the voltage increases above the minimum voltage level required for normal operation. CONTROL LOGIC The control logic block controls when the low-side and high-side drivers are enabled. The logic implements the Truth Table found in the specification and monitors the M0, M1, PWM, CL, OT, OV, LSE, and HSE pins. Note that the drivers are enabled 3 µs after the PWM edge. During complimentary chop mode the high-side and low-side drives are alternatively enabled and disabled during the PWM cycle. To prevent shoot-through current, the high-side drive turn-on is delayed by tD1, and the low-side drive turn on is delayed by tD2 (see Figure 4, page 8). Note that the drivers are disabled during an overtemperature or overvoltage fault. A flip-flop keeps the drive off until the following PWM cycle. This prevents erratic operation during fault conditions. The current limit circuit also uses a flip-flop for latching the drive off until the following PWM cycle. Note PWM must be toggled after POR, Thermal Limit, or overvoltage faults to re-enable the gate drivers. VGDH The VGDH pin is used to provide a gate drive signal to a reverse battery protection MOSFET. If reverse battery protection is desired, VIGN would be applied to the source of an external MOSFET, and the drain of the MOSFET would then deliver a "protected" supply voltage (VIGNP) to the three phase array of external MOSFETs as well as the supply voltage to the VIGNP pin of the IC. In a reverse polarity event (e.g., an erroneous installation of the system battery), the VGDH signal will not be supplied to the external protection MOSFET, and the MOSFET will remain off and thus prevent reverse polarity from being applied to the load and the VIGNP supply pin of the IC. HIGH-SIDE GATE DRIVE CIRCUITS Outputs GDH1, GDH2, and GDH3 provide the elevated drive voltage to the high-side external MOSFETs (HS1, HS2, and HS3; see Figure 5, page 13). These gate drive outputs supply the peak currents required to turn ON and hold ON the high-side MOSFETs, as well as turn OFF the MOSFETs. These gate drive circuits are powered from an internal charge pump, and therefore compensate for voltage dropped across the load that is reflected to the source-gate circuits of the high-side MOSFETs. LOW-SIDE GATE DRIVE CIRCUITS Outputs GDL1, GDL2, and GDL3 provide the drive voltage to the low-side external MOSFETs (LS1, LS2, and LS3; see CRES = QG x VGS 2 x VGS x VSAG - VSAG 2 CRES = (60 nC) x (14 V) 2 x (14 V) x (0.2 V) - (0.2)2 = 0.15 µF CRES 20 < CP1 = CP2 < 10 CRES 0.15 µF 20 = 0.075 µF, lower limit; and 10 0.15 µF = .015 µF, upper lim |
Số phần tương tự - MCZ33395EW |
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Mô tả tương tự - MCZ33395EW |
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