Analog Integrated Circuit Device Data

Freescale Semiconductor

3

33291L

PIN CONNECTIONS

PIN CONNECTIONS

Figure 3. 33291L Pin Connections

Table 2. 33291L Pin Definitions

PIN

NUMBER

PIN NAME

FORMAL NAME

DEFINITION

1

OP7

Output 7

Connection to drain of output MOSFET number seven.

2

OP6

Output 6

Connection to drain of output MOSFET number six.

3

SCLK

System Clock

Clocks the internal Shift registers of the 33291L.

4

SI

Serial Input

This pin is for the input of serial instruction data. SI information is read on the falling

edge of SCLK.

5–8, 17–20

GND

Ground

Connection to IC Power Ground and functions as part of heat sinking path.

9

SO

Serial Output

Tri-stateable output from the Shift register.

10

CS

Chip Select

Whenever this pin is in a logic low state, data can be transferred from the MCU to

the 33291L through the SI pin and from the 33291L to the MCU through the SO pin.

11

OP5

Output 5

Connection to drain of output MOSFET number five.

12

OP4

Output 4

Connection to drain of output MOSFET number four.

13

OP3

Output 3

Connection to drain of output MOSFET number three.

14

OP2

Output 2

Connection to drain of output MOSFET number two.

15

SFPD

Short Fault

Protect Disable

This pin is used to prevent the outputs from latching-OFF because of an overcurrent

condition.

16

Logic Supply

Plus supply for logic.

21

V

PWR

Output MOSFET

Gate Drive Supply

Main power supply.

22

RST

Reset

This pin is active low. It is used to clear the SPI Shift register, thereby setting all

output switches OFF

.

23

OP1

Output 1

Connection to drain of output MOSFET number one.

24

OP0

Output 0

Connection to drain of output MOSFET number zero.

OP0

GND

GND

GND

GND

VDD

SFPD

OP2

OP3

OP1

RST

VPWR

OP7

GND

GND

GND

GND

SO

CS

OP4

OP6

SCLK

SI

OP5

5

6

7

8

9

10

11

12

2

3

4

24

20

19

18

17

16

15

13

23

22

21

14

1