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MC68HC908AB32MFU bảng dữ liệu(PDF) 5 Page - Freescale Semiconductor, Inc

tên linh kiện MC68HC908AB32MFU
Giải thích chi tiết về linh kiện  Microcontrollers
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
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MC68HC908AB32 Rev. 1.1
Technical Data
Freescale Semiconductor
Table of Contents
5
Technical Data — MC68HC908AB32
Table of Contents
Section 1. General Description
1.1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
1.3
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
1.4
MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1.5
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
1.6
Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
1.6.1
Power Supply Pins (VDD and VSS) . . . . . . . . . . . . . . . . . . . .34
1.6.2
Oscillator Pins (OSC1 and OSC2) . . . . . . . . . . . . . . . . . . . . 35
1.6.3
External Reset Pin (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
1.6.4
External Interrupt Pin (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . 35
1.6.5
Analog Power Supply Pin (VDDA) . . . . . . . . . . . . . . . . . . . . .35
1.6.6
Analog Ground Pin (VSSA) . . . . . . . . . . . . . . . . . . . . . . . . . .35
1.6.7
Analog Ground Pin (AVSS/VREFL). . . . . . . . . . . . . . . . . . . . .35
1.6.8
ADC Voltage Reference Pin (VREFH) . . . . . . . . . . . . . . . . . .36
1.6.9
Analog Supply Pin (VDDAREF) . . . . . . . . . . . . . . . . . . . . . . .36
1.6.10
External Filter Capacitor Pin (CGMXFC) . . . . . . . . . . . . . . . 36
1.6.11
Port A Input/Output (I/O) Pins (PTA7–PTA0) . . . . . . . . . . . . 36
1.6.12
Port B I/O Pins (PTB7/ATD7–PTB0/ATD0) . . . . . . . . . . . . . 36
1.6.13
Port C I/O Pins (PTC5–PTC0) . . . . . . . . . . . . . . . . . . . . . . . 36
1.6.14
Port D I/O Pins (PTD7–PTD0) . . . . . . . . . . . . . . . . . . . . . . . 37
1.6.15
Port E I/O Pins (PTE7/SPSCK–PTE0/TxD) . . . . . . . . . . . . . 37
1.6.16
Port F I/O Pins (PTF7–PTF0/TACH2) . . . . . . . . . . . . . . . . . 37
1.6.17
Port G I/O Pins (PTG2/KBD2–PTG0/KBD0) . . . . . . . . . . . . 37
1.6.18
Port H I/O Pins (PTH1/KBD4–PTH0/KBD3). . . . . . . . . . . . . 37
1.7
I/O Pin Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
1.8
Signal Name Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
1.9
Clock Source Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40


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