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AD1987 bảng dữ liệu(PDF) 11 Page - Analog Devices

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AD1987 bảng dữ liệu(HTML) 11 Page - Analog Devices

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AD1987
Rev. 0
|
Page 11 of 18
|
May 2007
POWER AND GROUND
DVIO 3.3 V
±10%
3
I
Connect to the I/O voltage used for the HD-audio controller signals.
DVSS
4, 7
I
Digital supply return (ground).
DVDD 3.3 V
±10%
9
I
Digital supply voltage 3.3 V. This is regulated down to Pin 1 to supply the internal
digital core.
AVDD 3.3 V
±5%
25, 38
I
CAUTION: DO NOT APPLY 5.0 V TO THESE PINS!
Analog supply voltage 3.3 V ONLY.
Note: AVDD supplies should be well regulated and filtered as supply noise degrades
audio performance.
MIC_BIAS_IN
33
I
Source for microphone bias boost circuitry.
Connect this pin to 5.0 V via a low-pass filter. When connected this way the AD1987 is
capable of providing +3.95 V as a mic bias to all of the mic bias pins.
If 5 V is not available, connect this pin to +3.3 V (AVDD) via a low-pass filter. The
AD1987 produces a mic bias voltage relative to the AVDD supply
(typically 3.0 V @ AVDD = 3.3 V).
AVSS
26, 42
I
Analog supply return (ground). AVSS should be connected to DVSS using a conductive
trace under, or close to, the AD1987.
Table 5. AD1987 Pin Descriptions (Continued)
Mnemonic
Pin No.
Function
Description
The symbols used in this table are defined as: I = Input, O = Output, LI = Line level input, LO = Line level output, HP = Output capable of driving
headphone load, MIC = Input supports microphones with MIC bias and boost amplifier, SWAP = Outputs can swap L/R channels (typically used
to support C/LFE or shared C/LFE function).


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