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97 / 429 page 97/429 ST92F124/F150/F250 - INTERRUPTS ARBITRATION MODES (Cont’d) Example 2 In the second example, (more complex, Figure 47), each interrupt service routine sets Interrupt Enable with the ei instruction at the beginning of the routine. Placed here, it minimizes response time for requests with a higher priority than the one being serviced. The level 2 interrupt routine (with the highest prior- ity) will be acknowledged first, then, when the ei instruction is executed, it will be interrupted by the level 3 interrupt routine, which itself will be inter- rupted by the level 4 interrupt routine. When the level 4 interrupt routine is completed, the level 3 in- terrupt routine resumes and finally the level 2 inter- rupt routine. This results in the three interrupt serv- ice routines being executed in the opposite order of their priority. It is therefore recommended to avoid inserting the ei instruction in the interrupt service rou- tine in Concurrent mode. Use the ei instruc- tion only in Nested mode. WARNING: If, in Concurrent Mode, interrupts are nested (by executing ei in an interrupt service routine), make sure that either ENCSR is set or CSR=ISR, otherwise the iret of the innermost in- terrupt will make the CPU use CSR instead of ISR before the outermost interrupt service routine is terminated, thus making the outermost routine fail. Figure 47. Complex Example of a Sequence of Interrupt Requests with: - Concurrent mode selected - IEN set to 1 during interrupt service routine execution 6 5 4 3 2 1 0 7 MAIN INT 5 INT 2 INT 3 INT 4 INT 5 INT 4 INT 3 INT 2 CPL is set to 7 CPL = 7 CPL = 7 CPL = 7 CPL = 7 CPL = 7 ei INTERRUPT 2 HAS PRIORITY LEVEL 2 INTERRUPT 3 HAS PRIORITY LEVEL 3 INTERRUPT 4 HAS PRIORITY LEVEL 4 INTERRUPT 5 HAS PRIORITY LEVEL 5 INT 2 INT 3 CPL = 7 CPL = 7 INT 5 CPL = 7 MAIN ei ei ei Priority Level of Interrupt Request ei 9 |
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