ST92124JDV1TC datasheet(57/429 Pages) STMICROELECTRONICS

tên linh kiện	ST92124JDV1TC

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ST92F124/F150/F250 - SINGLE VOLTAGE FLASH & E3 TM (EMULATED EEPROM)

REGISTER DESCRIPTION (Cont’d)

When in Erase Suspend the memory accepts only

the following operations: Read, Erase Resume

and Byte Program. Updating the E3 TM memory is

not possible during a Flash Erase Suspend.

0: Resume sector erase when FWMS is set again.

1: Suspend Sector erase

Bit 1 = PROT: Set Protection (Read/Write).

This bit must be set to select the Set Protection op-

eration. This bit is automatically reset at the end of

the Set Protection operation.

The Set Protection operation allows “0”s in place

of “1”s to be programmed in the four Non Volatile

Protection registers. From 1 to 4 bytes can be en-

tered (in any order, no need for an ordered ad-

dress sequence) before starting the execution by

setting the FWMS bit. Data to be programmed and

addresses in which to program must be provided

(through an LD instruction, for example). Protec-

tion contained in addresses that are not entered

are left unchanged.

0: Deselect protection

1: Select protection

Bit 0 = FBUSY: Flash Busy (Read Only).

This bit is automatically set during Page Program,

Byte Program, Sector Erase or Set Protection op-

erations when the first address to be modified is

latched in Flash memory, or during Chip Erase op-

eration when bit FWMS is set. When this bit is set

every read access to the Flash memory will output

invalid data (FFh equivalent to a NOP instruction),

while every write access to the Flash memory will

be ignored. At the end of the write operations or

during a Sector Erase Suspend this bit is automat-

ically reset and the memory returns to read mode.

After an Erase Resume this bit is automatically set

again. The FBUSY bit remains high for a maxi-

mum of 10

µs after Power-Up and when exiting

Power-Down mode, meaning that the Flash mem-

ory is not yet ready to be accessed.

0: Flash not busy

1: Flash busy

E3 TM

CONTROL REGISTER (ECR)

Address: 224001h /221001h- Read/Write

Reset value: 000x x000 (xxh)

The E3 TM Control Register is used to enable all the

operations for the E3 TM memory.

The ECR also contains two bits (WFIS and FEIEN)

that are related to both Flash and E3 TM memories.

Bit 7 = EWMS: E3 TM Write Mode Start.

This bit must be set to start every write/erase oper-

ation in the E3 TM memory. At the end of the write/

erase operation this bit is automatically reset. Re-

setting by software this bit does not stop the cur-

rent write operation.

0: No effect

1: Start E3 TM write

Bit 6 = EPAGE: E3 TM page update.

This bit must be set to select the Page Update op-

eration in E3 TM memory. The Page Update opera-

tion allows to write a new content: both “0”s in

place of “1”s and “1”s in place of “0”s. From 1 to 16

bytes can be entered (in any order, no need for an

ordered address sequence) before starting the ex-

ecution by setting bit EWMS. All the addresses

must belong to the same page (only the 4 LSBs of

address can change). Data to be programmed and

addresses in which to program must be provided

(through an LD instruction, for example). Data

contained in page addresses that are not entered

are left unchanged. This bit is automatically reset

at the end of the Page Update operation.

0: Deselect page update

1: Select page update

Bit 5 = ECHIP: E3 TM chip erase.

This bit must be set to select the Chip Erase oper-

ation in the E3 TM memory. The Chip Erase opera-

tion allows to erase all the E3 TM locations to FFh.

The execution starts by setting bit EWMS. This bit

is automatically reset at the end of the Chip Erase

operation.

0: Deselect chip erase

1: Select chip erase

Bit 4:3 = Reserved.

765

4

3

2

1

0

EWMS EPAGE ECHIP

WFIS

FEIEN EBUSY

9

Số phần tương tự - ST92124JDV1TC

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
STMicroelectronics	ST92124JDV1TC	3Mb / 426P	8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD

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Mô tả tương tự - ST92124JDV1TC

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