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1 / 6 page Philips Semiconductors Product specification 74ABT573A Octal D-type transparent latch (3-State) 1 1995 Sep 06 853–1455 15703 FEATURES • 74ABT573A is flow-through pinout version of 74ABT373 • Inputs and outputs on opposite side of package allow easy interface to microprocessors • 3-State output buffers • Common output enable • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model • Power-up 3-State • Power-up reset DESCRIPTION The 74ABT573A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT573A device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74ABT573A is functionally identical to the 74ABT373 but has a flow-through pinout configuration to facilitate PC board layout and allow easy interface with microprocessors. The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is High. The latch remains transparent to the data inputs while E is High, and stores the data that is present one setup time before the High-to-Low enable transition. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in the High-impedance ”OFF” state, which means they will neither drive nor load the bus. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay Dn to Qn CL = 50pF; VCC = 5V 2.8 3.3 ns CIN Input capacitance VI = 0V or VCC 3 pF COUT Output capacitance Outputs disabled; VO = 0V or VCC 6 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 100 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic DIP –40 °C to +85°C 74ABT573A N 74ABT573A N SOT146-1 20-Pin plastic SO –40 °C to +85°C 74ABT573A D 74ABT573A D SOT163-1 20-Pin Plastic SSOP Type II –40 °C to +85°C 74ABT573A DB 74ABT573A DB SOT339-1 20-Pin Plastic TSSOP Type I –40 °C to +85°C 74ABT573A PW 74ABT573APW DH SOT360-1 PIN CONFIGURATION 20 19 18 17 16 15 14 13 12 10 11 9 8 7 6 5 4 3 2 1 VCC Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 E OE D0 D1 D2 D3 D4 D5 D6 D7 GND SA00185 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 OE Output enable input (active-Low) 2, 3, 4, 5, 6, 7, 8, 9 D0-D7 Data inputs 19, 18, 17, 16, 15, 14, 13, 12 Q0-Q7 Data outputs 11 E Enable input (active-High) 10 GND Ground (0V) 20 VCC Positive supply voltage |
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