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ISL12020 bảng dữ liệu(PDF) 5 Page - Intersil Corporation |
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ISL12020 bảng dữ liệu(HTML) 5 Page - Intersil Corporation |
5 / 25 page 5 FN6450.0 March 29, 2007 tDH Output Data Hold Time From SCL falling edge crossing 30% of VDD, until SDA enters the 30% to 70% of VDD window. 0ns tR SDA and SCL Rise Time From 30% to 70% of VDD. 20 + 0.1 x Cb 300 ns tF SDA and SCL Fall Time From 70% to 30% of VDD. 20 + 0.1 x Cb 300 ns Cb Capacitive loading of SDA or SCL Total on-chip and off-chip 10 400 pF RPU SDA and SCL Bus Pull-up Resistor Off-chip Maximum is determined by tR and tF. For Cb = 400pF, max is about 2~2.5k Ω. For Cb = 40pF, max is about 15~20k Ω 1k Ω NOTES: 2. Temperature Conversion is inactive below 2.7V VBAT 3. IRQ/FOUT Inactive. 4. VIL = VDD x 0.1, VIH = VDD x 0.9, fSCL = 400kHz 5. VDD > VBAT +VBATHYS 6. Bit BSW = 0 (Standard Mode), VBAT ≥ 1.8V 7. Specified at +25°C. 8. In order to ensure proper timekeeping, the VDD SR- specification must be followed. 9. Parameter is not 100% tested. 10. These are I2C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification. I2C Interface Specifications Test Conditions: VDD=+2.7 to +5.5V, Temperature = -20°C to +70°C, unless otherwise specified. (Continued) SYMBOL PARAMETER TEST CONDITIONS MIN TYP (Note 7) MAX UNITS NOTES ISL12020 |
Số phần tương tự - ISL12020 |
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Mô tả tương tự - ISL12020 |
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