AD9949KCPZRL datasheet(8/36 Pages) AD

tên linh kiện	AD9949KCPZRL

Giải thích chi tiết về linh kiện	12-Bit CCD Signal Processor with Precision Timing Core

Download	36 Pages

Scroll/Zoom	100%

nhà sản xuất	AD [Analog Devices]

Trang chủ	http://www.analog.com

Logo

8 / 36 page

AD9949

Rev. B | Page 8 of 36

TERMINOLOGY

Differential Nonlinearity (DNL)

An ideal ADC exhibits code transitions that are exactly 1 LSB

apart. DNL is the deviation from this ideal value. Thus, every

code must have a finite width. No missing codes guaranteed to

12-bit resolution indicates that all 4096 codes, respectively, must

be present over all operating conditions.

Integral Nonlinearity (INL)

INL is the deviation of each individual code measured from a

true straight line from zero to full scale. The point used as zero

scale occurs 0.5 LSB before the first code transition. Positive full

scale is defined as a level 1 LSB and 0.5 LSB beyond the last

code transition. The deviation is measured from the middle of

each particular output code to the true straight line.

Peak Nonlinearity

Peak nonlinearity, a full signal chain specification, refers to the

peak deviation of the output of the AD9949 from a straight line.

The point used as zero scale occurs 0.5 LSB before the first code

transition. Positive full scale is defined as a level 1 LSB and

0.5 LSB beyond the last code transition. The deviation is

measured from the middle of each particular output code to the

straight line reference. The error is then expressed as a

percentage of the 2 V ADC full-scale signal. The input signal is

appropriately gained up to fill the ADC’s full-scale range.

Total Output Noise

The rms output noise is measured using histogram techniques.

The standard deviation of the ADC output codes is calculated

in LSB and represents the rms noise level of the total signal

chain at the specified gain setting. The output noise can be con-

verted to an equivalent voltage, using the relationship

1 LSB = (ADC full scale/2n codes)

where n is the bit resolution of the ADC. For the AD9949,

1 LSB is approximately 0.488 mV.

Power Supply Rejection (PSR)

The PSR is measured with a step change applied to the supply

pins. The PSR specification is calculated from the change in the

data outputs for a given step change in the supply voltage.

Số phần tương tự - AD9949KCPZRL

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD9949	395Kb / 6P	Tape and Reel Packaging
Analog Devices	AD9949	714Kb / 36P	12-Bit CCD Signal Processor with Precision Timing Core REV. B

More results

Mô tả tương tự - AD9949KCPZRL

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD9949	714Kb / 36P	12-Bit CCD Signal Processor with Precision Timing Core REV. B
	AD9971	67Kb / 2P	12-Bit CCD Signal Processor with Precision Timing Rev. SpA
	AD9971	79Kb / 2P	12-Bit CCD Signal Processor with Precision Timing Rev. SpB
	AD9979	589Kb / 56P	14-Bit, CCD Signal Processor with Precision Timing Core REV. C
	AD9979BCPZRL	589Kb / 56P	14-Bit, CCD Signal Processor with Precision Timing Core REV. C
	AD9979	62Kb / 2P	14-Bit, CCD Signal Processor with Precision Timing Core Rev. Sp0
	AD9979BCPZ	589Kb / 56P	14-Bit, CCD Signal Processor with Precision Timing Core REV. C
	AD9948	545Kb / 28P	10-Bit CCD Signal Processor with Precision Timing Core REV. 0
	AD9948	522Kb / 28P	10-Bit CCD Signal Processor with Precision Timing??Core REV. 0
	AD9992	1Mb / 92P	12-Bit CCD Signal Processor with Precision Timing Generator Rev. C

More results

AD9949KCPZRL bảng dữ liệu(PDF) 8 Page - Analog Devices

AD9949KCPZRL bảng dữ liệu(HTML) 8 Page - Analog Devices

Số phần tương tự - AD9949KCPZRL

Mô tả tương tự - AD9949KCPZRL

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

bảng dữ liệu tải về

Link URL