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AM29BDS640GBC4WSI bảng dữ liệu(PDF) 3 Page - Advanced Micro Devices |
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AM29BDS640GBC4WSI bảng dữ liệu(HTML) 3 Page - Advanced Micro Devices |
3 / 77 page Publication Number 25903 Revision C Amendment 2 Issue Date May 9, 2006 Am29BDS640G 64 Megabit (4 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory Data Sheet Distinctive Characteristics Architectural Advantages Single 1.8 volt read, program and erase (1.65 to 1.95 volt) Manufactured on 0.17 µm process technology Enhanced VersatileIO™ (VIO) Feature — Device generates data output voltages and tolerates data input voltages as determined by the voltage on the VIO pin — 1.8V and 3V compatible I/O signals Simultaneous Read/Write operation — Data can be continuously read from one bank while executing erase/program functions in other bank — Zero latency between read and write operations —Four bank architecture: 16Mb/16Mb/16Mb/16Mb Programmable Burst Interface — 2 Modes of Burst Read Operation — Linear Burst: 8, 16, and 32 words with wrap-around —Continuous Sequential Burst Sector Architecture — Eight 8 Kword sectors and one hundred twenty-six 32 Kword sectors — Banks A and D each contain four 8 Kword sectors and thirty-one 32 Kword sectors; Banks B and C each contain thirty-two 32 Kword sectors — Eight 8 Kword boot sectors, four at the top of the address range, and four at the bottom of the address range Minimum 1 million erase cycle guarantee per sector 20-year data retention at 125°C — Reliable operation for the life of the system 80-ball FBGA package PERFORMANCE CHARCTERISTICS Read access times at 54/40 MHz (at 30 pF) — Burst access times of 13.5/20 ns — Asynchronous random access times of 70 ns — Initial Synchronous access times as fast as 87.5/95 ns Power dissipation (typical values, CL = 30 pF) — Burst Mode Read: 10 mA — Simultaneous Operation: 25 mA — Program/Erase: 15 mA — Standby mode: 0.2 µA Hardware Features Sector Protection — Software command sector locking Handshaking feature available — Provides host system with minimum possible latency by monitoring RDY Hardware reset input (RESET#) — Hardware method to reset the device for reading array data WP# input — Write protect (WP#) function protects sectors 0 and 1 (bottom boot), or sectors 132 and 133 (top boot), regardless of sector protect status ACC input: Acceleration function reduces programming time; all sectors locked when ACC = VIL CMOS compatible inputs, CMOS compatible outputs Low VCC write inhibit Software Features Supports Common Flash Memory Interface (CFI) Software command set compatible with JEDEC 42.4 standards — Backwards compatible with Am29F and Am29LV families Data# Polling and toggle bits — Provides a software method of detecting program and erase operation completion Erase Suspend/Resume — Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation Unlock Bypass Program command — Reduces overall programming time when issuing multiple program command sequences This product has been retired and is not recommended for designs. For new designs, S29WS064K supersedes Am29BDS640G. Please refer to the S29WS-K family data sheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. |
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