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MC14503B bảng dữ liệu(PDF) 1 Page - Motorola, Inc |
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MC14503B bảng dữ liệu(HTML) 1 Page - Motorola, Inc |
1 / 6 page MOTOROLA CMOS LOGIC DATA MC14503B 326 Hex Non-Inverting 3-State Buffer The MC14503B is a hex non–inverting buffer with 3–state outputs, and a high current source and sink capability. The 3–state outputs make it useful in common bussing applications. Two disable controls are provided. A high level on the Disable A input causes the outputs of buffers 1 through 4 to go into a high impedance state and a high level on the Disable B input causes the outputs of buffers 5 and 6 to go into a high impedance state. • 3–State Outputs • TTL Compatible — Will Drive One TTL Load Over Full Temperature Range • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Two Disable Controls for Added Versatility • Pin for Pin Replacement for MM80C97 and 340097 MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage – 0.5 to + 18.0 V Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V Iin Input Current (DC or Transient), per Pin ± 10 mA Iout Output Current (DC or Transient), per Pin ± 25 mA PD Power Dissipation, per Package† 500 mW Tstg Storage Temperature – 65 to + 150 _C TL Lead Temperature (8–Second Soldering) 260 _C * Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/ _C From 100_C To 125_C CIRCUIT DIAGRAM * INn * DISABLE * INPUT TO OTHER BUFFERS VSS VDD OUTn * Diode protection on all inputs (not shown) ONE OF TWO/FOUR BUFFERS This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. MOTOROLA SEMICONDUCTOR TECHNICAL DATA © Motorola, Inc. 1995 REV 3 1/94 MC14503B L SUFFIX CERAMIC CASE 620 ORDERING INFORMATION TA = – 55° to 125°C for all packages. P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B LOGIC DIAGRAM MC14XXXBCP Plastic MC14XXXBCL Ceramic MC14XXXBD SOIC TRUTH TABLE Appropriate Disable Inn Input Outn 0 0 0 1 0 1 X 1 High Impedance X = Don’t Care DISABLE B OUT 5 15 12 14 2 4 6 10 1 IN 5 IN 6 IN 1 IN 2 IN 3 IN 4 DISABLE A OUT 6 OUT 1 OUT 2 OUT 3 OUT 4 11 13 3 5 7 9 VDD = PIN 16 VSS = PIN 8 |
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