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MC33364 bảng dữ liệu(PDF) 7 Page - ON Semiconductor |
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MC33364 bảng dữ liệu(HTML) 7 Page - ON Semiconductor |
7 / 16 page MC33364 http://onsemi.com 7 OPERATING DESCRIPTION Introduction The MC33364 series represents a variable−frequency current−mode critical−conduction solution with integrated high voltage startup and protection circuitry to implement an off−line flyback converter for modern consumer electronic power supplies. Different frequency clamp options offer different customized needs. This device series includes an integrated 700 V Very High−Voltage (VHV) start−up circuit. Thus, it is possible to design an application with universal input voltage from 85 Vac to 265 Vac without any additional startup circuits or components. The critical conduction feature offers some advantages. First, the MOSFET turns on at zero current and the diode turns off at zero current. The zero current reduces these turn−on and turn−off switching losses. It also reduces the Electro−Magnetic Interface (EMI) of the SMPS and a less expensive rectifier can be used. Second, by preventing the SMPS from entering the discontinuous conduction mode (DCM), the peak MOSFET drain current is limited to only twice the average input current. It needs a smaller and less expensive MOSFET. Third, by preventing the SMPS from entering the Continuous Conduction Mode (CCM), the flyback topology transfer function stays first−order and its feedback compensation network is considerably simplified. It also maximizes the power transfer by the flyback transformer to its 1/2 L I2 limits. A description of each of the functional blocks is given below. The representative block diagram and typical application circuit are in Figure 1 and Figure 2. Line, VCC, Startup Circuit and Reference Voltage The Line pin is capable of a maximum 700 V so that it is possible to connect this pin directly to the rectified high−voltage Alternating Current (AC) input for minimizing the number of external components. There is a startup circuit block that regulates voltage from the Line pin to the VCC pin in an abnormal situation. In normal conditions, the auxiliary winding powers up the VCC and this startup circuit is opened and saves approximate 0.7 W of power compared to the resistor bootstrapped circuits. In normal operation, the auxiliary winding powers up the VCC voltage. This voltage is a constant value between the UVLO limits (7.6 V and 15 V). It is further regulated to a constant 5 V reference voltage Vref for the internal circuitry usage. As long as the VCC voltage is between 7.6 V and 15 V, it means the auxiliary winding can provide voltage as in normal condition. The device recognizes that there is no fault in the circuit and the device remains in the normal operation status. However, when the auxiliary winding cannot power up VCC, the VCC voltage will reach its UVLO limit. The device recognizes that it is an abnormal situation (such as startup or output short−circuited). The VCC voltage is not constant in this case. Figure 3 shows the timing diagram in a fault condition. There are three Under−Voltage Lock−Out (UVLO) thresholds with respect to VCC. The upper threshold is 15 V. When this limit is reached, the startup circuit block turns off and VCC declines due to power consumption of the circuitry. The startup circuit block turns on when VCC reaches 7.6 V and if Vref is higher than 3.7 V. It is the second threshold of VCC. If Vref is smaller than 3.7 V, the startup circuit will turn on when VCC reaches a temperature dependent value VT ranging between 3.5 V and 6 V. It is the last threshold of VCC. This temperature dependent threshold is lower when temperature is higher so that it takes a longer time to restore the VCC. It is a protection feature, which allows more dead time for cooling in high temperature condition. There is an UVLO in the Vref regulator block. When VCC falls below typical 8.1 V in abnormal situation, the Vref regulator block stops. Vref and VCC collapses due to power consumption of the circuitry. When Vref collapses to below 3.7 V, the device cannot provide the Drive output and makes a dead time. This dead time is designed for minimal power transfer in the abnormal conditions. The dead time ends when VCC reaches 15 V after reaching the UVLO limit VT (3.5 to 6 V). Reaching VT enables the startup circuit block, charging up the VCC capacitor again. When VCC reaches 15 V again, the Vref regulator block turns on and allows the output to work again. It is recommended to put a 0.1 uF capacitor on Vref pin for stability of the voltage buffer. The VCC capacitor is relatively larger than this 0.1 uF capacitor, making a longer VCC charging time from VT to 15 V and a longer dead time in the abnormal or fault conditions. Zero Current Detect To achieve critical conduction mode, MOSFET conduction is always initiated by sensing a zero current signal from the Zero Current Detect (ZCD) pin. The ZCD pin indirectly monitors the inductor current by sensing the auxiliary winding voltage. When the voltage falls below a threshold of 1.0V, the comparator resets the RS latch to turn the MOSFET on. There is 200 mV of hysteresis built into the comparator for noise immunity and to prevent false tripping. There are 10 V and 0.7 V clamps in the ZCD pin for protection. An external resistor is recommended to limit the input current to 2 mA to protect the clamps. Watchdog Timer A watchdog timer block is added to the device to start or restart the Drive output when something goes wrong in the ZCD. When the inductor current reaches zero for longer than approximate 410 ms, the timer reset the RS latch and that turns the MOSFET on. |
Số phần tương tự - MC33364 |
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Mô tả tương tự - MC33364 |
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