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MC33364DG bảng dữ liệu(PDF) 9 Page - ON Semiconductor |
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MC33364DG bảng dữ liệu(HTML) 9 Page - ON Semiconductor |
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9 / 16 page  MC33364 http://onsemi.com 9 APPLICATION INFORMATION Design Example Design an off−line Flyback converter according to the following requirements: Output Power: 12 W Output: 6.0 V @ 2 Amperes Input voltage range: 90 Vac − 270 Vac, 50/60 Hz The operation for the circuit shown in Figure 12 is as follows: the rectifier bridge D1−D4 and the capacitor C1 convert the ac line voltage to dc. This voltage supplies the primary winding of the transformer T1 and the startup circuit in U1 through the line pin. The primary current loop is closed by the transformer’s primary winding, the TMOS switch Q1 and the current sense resistor R7. The resistors R5, R6, diode D6 and capacitor C4 create a snubber clamping network that protects Q1 from spikes on the primary winding. The network consisting of capacitor C3, diode D5 and resistor R1 provides a VCC supply voltage for U1 from the auxiliary winding of the transformer. The resistor R1 makes VCC more stable and resistant to noise. The resistor R2 reduces the current flow through the internal clamping and protection zener diode of the Zero Crossing Detector (ZCD) within U1. C3 is the decoupling capacitor of the supply voltage. The resistor R3 can provide additional bias current for the optoisolator’s transistor. The diode D8 and the capacitor C5 rectify and filter the output voltage. The TL431, a programmable voltage reference, drives the primary side of the optoisolator to provide isolated feedback to the MC33364. The resistor divider consisting of R10 and R11 program the voltage of the TL431. The resistor R9 and the capacitors C7 and C8 provide frequency compensation of the feedback loop. Resistor R8 provides a current limit for the opto coupler and the TL431. Since the critical conduction mode converter is a variable frequency system, the MC33364 has a built−in special block to reduce switching frequency in the no load condition. This block is named the ”frequency clamp” block. MC33364 used in the design example has an internal frequency clamp set to 126 kHz. However, optional versions with a disabled or variable frequency clamp are available. The frequency clamp works as follows: the clamp controls the part of the switching cycle when the MOSFET switch is turned off. If this ”off−time” (determined by the reset time of the transformer’s core) is too short, then the frequency clamp does not allow the switch to turn−on again until the defined frequency clamp time is reached (i.e., the frequency clamp will insert a dead time). There are several advantages of the MC33364’s startup circuit. The startup circuit includes a special high voltage switch that controls the path between the rectified line voltage and the VCC supply capacitor to charge that capacitor by a limited current when the power is applied to the input. After a few switching cycles the IC is supplied from the transformer’s auxiliary winding. After VCC reaches the undervoltage lockout threshold value, the startup switch is turned off by the undervoltage and the overvoltage control circuit. Because the power supply can be shorted on the output, causing the auxiliary voltage to be zero, the MC33364 will periodically start its startup block. This mode is named “hiccup mode”. During this mode the temperature of the chip rises but remains protected by the thermal shutdown block. During the power supply’s normal operation, the high voltage internal MOSFET is turned off, preventing wasted power, and thereby, allowing greater circuit efficiency. Since a bridge rectifier is used, the resulting minimum and maximum dc input voltages can be calculated: V in(min) dc + 2 xV in(min) ac + 2 (90 Vac) + 127 V V in( max) dc + 2 xV in( max) ac + 2 (270 Vac) + 382 V The maximum average input current is: I in + Pout nV in(min) + 12 W 0.8(127 V) + 0.118 A where n = estimated circuit efficiency. A TMOS switch with 600 V avalanche breakdown voltage is used. The voltage on the switch’s drain consists of the input voltage and the flyback voltage of the transformer’s primary winding. There is a ringing on the rising edge’s top of the flyback voltage due to the leakage inductance of the transformer. This ringing is clamped by the RCD network. Design this clamped wave for an amplitude of 50 V below the avalanche breakdown of the TMOS device. Add another 50 V to allow a safety margin for the MOSFET. Then a suitable value of the flyback voltage may be calculated: V flbk + V TMOS * V in(max) * 100 V + 600 V * 382 V * 100 V + 118 V Since this value is very close to the Vin(min), set: V flbk + V in(min) + 127 V The Vflbk value of the duty cycle is given by: max + V flbk V flbk ) V in(min) + 127 V [127 V ) 127 V] + 0.5 The maximum input primary peak current: I ppk + 2I in max + 2.0(0.118 A) 0.5 + 0.472 A Choose the desired minimum frequency fmin of operation to be 70 kHz. After reviewing the core sizing information provided by a core manufacturer, a EE core of size about 20 mm was chosen. Siemens’ N67 magnetic material is used, which corresponds to a Philips 3C85 or TDK PC40 material. |
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Mô tả tương tự - MC33364DG |
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