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MC9S08RD8FJE bảng dữ liệu(PDF) 8 Page - Freescale Semiconductor, Inc

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MC9S08RD8FJE bảng dữ liệu(HTML) 8 Page - Freescale Semiconductor, Inc

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MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
8
Freescale Semiconductor
Section Number
Title
Page
Chapter 4
Memory
4.1
MC9S08RC/RD/RE/RG Memory Map ..........................................................................................35
4.1.1
Reset and Interrupt Vector Assignments ........................................................................36
4.2
Register Addresses and Bit Assignments ........................................................................................38
4.3
RAM ................................................................................................................................................42
4.4
FLASH ............................................................................................................................................42
4.4.1
Features ...........................................................................................................................43
4.4.2
Program and Erase Times ...............................................................................................43
4.4.3
Program and Erase Command Execution .......................................................................44
4.4.4
Burst Program Execution ...............................................................................................45
4.4.5
Access Errors ..................................................................................................................46
4.4.6
FLASH Block Protection ...............................................................................................47
4.4.7
Vector Redirection ..........................................................................................................48
4.5
Security ............................................................................................................................................48
4.6
FLASH Registers and Control Bits .................................................................................................49
4.6.1
FLASH Clock Divider Register (FCDIV) ......................................................................49
4.6.2
FLASH Options Register (FOPT and NVOPT) .............................................................51
4.6.3
FLASH Configuration Register (FCNFG) .....................................................................51
4.6.4
FLASH Protection Register (FPROT and NVPROT) ....................................................52
4.6.5
FLASH Status Register (FSTAT) ...................................................................................54
4.6.6
FLASH Command Register (FCMD) ............................................................................55
Chapter 5
Resets, Interrupts, and System Configuration
5.1
Introduction .....................................................................................................................................57
5.2
Features ...........................................................................................................................................57
5.3
MCU Reset ......................................................................................................................................57
5.4
Computer Operating Properly (COP) Watchdog .............................................................................58
5.5
Interrupts .........................................................................................................................................58
5.5.1
Interrupt Stack Frame .....................................................................................................59
5.5.2
External Interrupt Request (IRQ) Pin .............................................................................60
5.5.2.1
Pin Configuration Options ..............................................................................60
5.5.2.2
Edge and Level Sensitivity ..............................................................................61
5.5.3
Interrupt Vectors, Sources, and Local Masks .................................................................61
5.6
Low-Voltage Detect (LVD) System ................................................................................................62
5.6.1
Power-On Reset Operation .............................................................................................63
5.6.2
LVD Reset Operation .....................................................................................................63
5.6.3
LVD Interrupt and Safe State Operation ........................................................................63
5.6.4
Low-Voltage Warning (LVW) ........................................................................................63
5.7
Real-Time Interrupt (RTI) ...............................................................................................................64


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