MC10135 datasheet(3/8 Pages) ONSEMI

tên linh kiện	MC10135

Giải thích chi tiết về linh kiện	Dual J-K Master-Slave Flip-Flop

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MC10135

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ELECTRICAL CHARACTERISTICS (continued)

TEST VOLTAGE VALUES (Volts)

@ Test Temperature

VIHmax

VILmin

VIHAmin

VILAmax

VEE

–30

°C

–0.890

–1.890

–1.205

–1.500

–5.2

+25

°C

–0.810

–1.850

–1.105

–1.475

–5.2

+85

°C

–0.700

–1.825

–1.035

–1.440

–5.2

Under

TEST VOLTAGE APPLIED TO PINS LISTED BELOW

(V

)

Characteristic

Symbol

Under

Test

VIHmax

VILmin

VIHAmin

VILAmax

VEE

(VCC)

Gnd

Power Supply Drain Current

IE

8

1, 16

Input Current

IinH

6,7,9,10,11

4,5,12,13

Note 1.

8

1, 16

IinL

4,5,6,7,9,

10,11,12,13

Note 2.

8

1, 16

Output Voltage

Logic 1

VOH

2

2 (3.)

5

6

8

1, 16

Output Voltage

Logic 0

VOL

3

3 (3.)

5

6

8

1, 16

Threshold Voltage

Logic 1

VOHA

2

2 (4.)

6

5

8

1, 16

Threshold Voltage

Logic 0

VOLA

3

3 (4.)

6

5

8

1, 16

Switching Times

(50

Ω Load)

Clock Input

Pulse In

Pulse Out

–3.2 V

+2.0 V

Propagation Delay

t9+2+

t9+2–

2

9

2

8

1, 16

Rise Time

(20 to 80%)

t2+, t3+

2, 3

9

2, 3

8

1, 16

Fall Time

(20 to 80%)

t2–, t3–

2, 3

9

2, 3

8

1, 16

Set Input

Propagation Delay

t5+2+

t12+15+

t5+3–

t12+14–

2

15

3

14

5

12

5

12

2

15

3

14

8

1, 16

Reset Input

Propagation Delay

t4+2–

t4+3–

t13+15–

t13+14+

2

3

15

14

4

13

2

3

15

14

8

1, 16

Setup Time

tsetup

7

6, 9

2

8

1, 16

Hold Time

thold

7

6, 9

2

8

1, 16

Toggle Frequency (Max)

ftog

2

9

2

8

1, 16

1. Individually test each input; apply VIHmax to pin under test.

2. Individually test each input; apply VILmin to pin under test.

3. Output level to be measured after a clock pulse has been applied to the CE Input (Pin 6)

VIHmax

VILmin

4. Output level to be measured after a clock pulse has been applied to the CE Input (Pin 6)

VIHAmax

VILAmin

Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been

established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.

Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the

same manner.

Số phần tương tự - MC10135

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
ON Semiconductor	MC10135	110Kb / 5P	Dual J-K Master-Slave Flip-Flop 1996 REV 5

More results

Mô tả tương tự - MC10135

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Toshiba Semiconductor	TC4027BP	270Kb / 7P	DUAL J-K MASTER-SLAVE FLIP FLOP
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ON Semiconductor	MC10H135	97Kb / 3P	Dual J-K Master-Slave Flip-Flop REV 6
ON Semiconductor	MC10135	110Kb / 5P	Dual J-K Master-Slave Flip-Flop 1996 REV 5
Toshiba Semiconductor	TC4027BP	329Kb / 9P	Dual J-K Master-Slave Flip Flop
STMicroelectronics	HCF4027B	218Kb / 9P	DUAL J-K MASTER SLAVE FLIP-FLOP
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Texas Instruments	CD4027B	1Mb / 27P	[Old version datasheet] CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments	CD4027B	676Kb / 14P	[Old version datasheet] CMOS Dual J-K Master-Slave Flip-Flop
Intersil Corporation	CD4027BMS	72Kb / 8P	CMOS Dual J-K Master-Slave Flip-Flop December 1992

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